MT90840 Mitel Networks Corporation, MT90840 Datasheet
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MT90840
Manufacturer Part Number
MT90840
Description
Distributed Hyperchannel Switch
Manufacturer
Mitel Networks Corporation
Datasheet
1.MT90840.pdf
(4 pages)
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Features
Time-slot interchange function between 8 pairs
of ST-BUS/GCI/MVIP streams (512 channels)
and a Parallel Data Port (PDP)
Supports star, point to point connections and
unidirectional or bidirectional ring topologies for
distributed systems
Input to Output Bypass function with minimum
delay for shared ring applications
Provides an internal latency adjustment buffer
for ring applications
Parallel port data rates up to 19.44Mbyte/s
Programmable data rates on the serial port side
(2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s)
Unidirectional Parallel switching mode for up to
2430 channels non-blocking
Per-channel direction control on the serial port
side
Per-channel message mode and high-
impedance control on both parallel and serial
port sides
8-bit multiplexed port compatible with Intel and
Motorola microcontrollers
Guarantees frame integrity when switching
wideband channels such as ISDN H0 channel
Provides external control lines allowing the fast
parallel interface to be shared with other
devices
Serial
Data
Port
DSo[0:7]
C4REF1
C4REF2
DSi[0:7]
C4OUT
FO
TMS
TDO
TCK
TDI
S-P
P-S
&
JTAG
SERIAL PORT TIMING
Figure 1 - Functional Block Diagram
RESET
CONTROL
RECEIVE PATH
DATA & CONN
MEMORIES
AD[0:7] ALE
Microprocessor Interface
TRANSMIT PATH
DATA & CONN
MEMORIES
WR/
R/W
RD/
DS
LATENCY
RECEIVE
BUFFER
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Applications
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PARALLEL PORT TIMING
CS
DTACK
Special diagnostic alarm functions for statistical
analysis
JTAG boundary scan
Bridging ST-BUS/MVIP buses to high speed
Time Division Multiplex backplanes at SONET
rates (STS-1/3)
High speed isochronous backbones for
distributed PBX and Local Area Network
systems
Switch platforms of up to 2430 channels with
guaranteed frame integrity for wideband
channels
Serial bus control and monitoring
Data multiplexer
High speed communications interface
Isochronous switching/multiplexing to support
IEEE 802.9 standards
Distributed Hyperchannel Switch
CONTROL
INT
MT90840AK
MT90840AP
INTERFACE
PARALLEL
EXTERNAL
CONTROL
PORT
Ordering Information
-40°C to 85°C
ISSUE 1
Advance Information
100 Pin PQFP
84 Pin PLCC
PDo0-7
PDi0-7
PPFRo
PPFRi
PCKR
PCKT
CT3
CT0
CT1
CT2
MT90840
Parallel
Data
Port
June 1995
2-189
Related parts for MT90840
MT90840 Summary of contents
Page 1
... BUFFER TRANSMIT PATH DATA & CONN MEMORIES Microprocessor Interface WR/ RD/ INT RESET AD[0:7] ALE CS DTACK R/W DS Figure 1 - Functional Block Diagram MT90840 Advance Information ISSUE 1 June 1995 Ordering Information 100 Pin PQFP 84 Pin PLCC -40°C to 85°C PPFRo PCKT PPFRi PCKR PDi0-7 Parallel PARALLEL ...
Page 2
... This type of synchronization scheme may be used in applications such as MVIP multi-chassis level 3 interface (MC-3 system) utilizing point to point or point to multipoint switching connections. When the MT90840 device operates in a ring type of application like the system depicted in Figure 2, a special mode called Parallel Data Bypass is provided of ...
Page 3
... & MT90840 ...
Page 4
... MT90840 Notes: 2-192 Advance Information ...