MT8977 Mitel Networks Corporation, MT8977 Datasheet - Page 17
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MT8977
Manufacturer Part Number
MT8977
Description
ISO-CMOS ST-BUS FAMILY T1/ESF Framer Circuit
Manufacturer
Mitel Networks Corporation
Datasheet
1.MT8977.pdf
(26 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT8977AP
Manufacturer:
ZARLINK
Quantity:
12 388
shows the MT8977 interfaced to a parallel bus
structure using two STPA‘s operating in modes 1 and
2.
The first STPA operating in mode 2 (MMS=0,
MS1=1, 24/32=0),
information between the parallel telecom bus and the
T1 or CEPT link via DSTi and DSTo. The second
STPA, operating in mode 1 (MMS = 1 ) provides
access from the signalling and link control bus to the
MT8977 status and control channels. All signalling
and link functions may be controlled easily through
the STPA transmit RAM’s Tx0, Tx1,
information is read at receive RAM Rx0. In addition,
interrupts can be set up to notify the system in case
of slips, loss of sync, alarms, violations, etc.
Preliminary Information
Processor
MT8952
Micro
RxCEN
CDSTo
TxCEN
CDSTi
CKi
STo3
STi3
MT8980
D Q
C2
C2
STo0
STo1
STo2
STi0
STi1
Q
C4i
F0i
routes
C2
D Q
data
Q
Figure 11 - Typical ESF Configuration
•
and/or
while status
voice
DSTi
DSTo
CSTi0
CSTo
CSTi1
F0i
C2i
C1.5i
TxFDL
TxFDLClk
RxFDL
RxFDLClk
E1.5i
MT8977
Extractor
Clock
Note: the configurations shown in Figures 11 and 12
using the MT8940/41 may not meet specific jitter
performance requirements.
PLL or line interface unit with transmit jitter
attenuator may be required for applications designed
to meet specific standards.
TxSF
RxSF
E8Ko
TxA
RxA
RxB
RxD
TxB
•
•
1.544
MHz
•
Receiver
Driver
•
Line
Line
Tx
ISO-CMOS
CVb
F0i
C2o
F0b
C4b
C8Kb
MT8940/41
AAAA AAAA
AA AA
AAAA
AA AA
AA
AA AA
AA AA
AA AA
AA AA
AA AA
AAAAAAAAAAAAAAAAAAAAAAAA
A more sophisticated
AAAA AAAA
MT8940/41
AAAA AAAA
MH89761
12.355/12.352
16.388/16.384
Equa-
lizer
MT8977
AAAA AAAA
MHz Osc.
MHz Osc.
AAAA AAAA
AAAA
AA
AA AA
AA
AA AA
AA AA
AA AA
AA AA
AA AA
4-115