NJM3773 New Japan Radio, NJM3773 Datasheet - Page 7

• Manufacturer Part Number: NJM3773
• Description: DUAL STEPPER MOTOR DRIVER
• Manufacturer: New Japan Radio

Current sense filtering
At turn-on a current spike occurs, due to the recovery of the recirculation diodes and the capacitance of the motor
winding. To prevent this spike from reseting the flip-flops through the current sensing comparators, the clock
oscillator generates a blanking pulse at turn-on. The blanking pulse disables the comparators for a short time.
Thereby any voltage transient across the sensing resistor will be ignored during the blanking time.
value. The time is calculated as:
t
As the C
possible. Nominal value is 4 700 pF, which gives a blanking time of 1.0 s.
motor current, will reach a slightly higher level than what is defined by the reference voltage. The filtering delay
also limits the minimum possible output current. As the output will be on for a short time each cycle, equal to the
digital filtering blanking time plus additional internal delays, an amount of current will flow through the winding.
Typically this current is 1-10 % of the maximum output current set by R
an external low pass filter in series with the comparator C input. In this case the digital blanking time should be as
short as possible. The recommended filter component values are 1 kohm and 820 pF.
Switching frequency
The frequency of the clock oscillator is set by the timing components R
filter blanking time, the clock oscillator frequency is adjusted by R
frequency is approximately calculated as:
f
Nominal component values of 12 kohm and 4 700 pF results in a clock frequency of 23.0 kHz. A lower frequency
will result in higher current ripple, but may improve low level linearity. A higher clock frequency reduces current
ripple, but increases the switching losses in the IC and possibly the iron losses in the motor.
Phase inputs
A logic HIGH on a Phase input gives a current flowing from pin M
the opposite direction. A time delay prevents cross conduction in the H-bridge when changing the Phase input.
Dis (Disable) inputs
A logic HIGH on the Dis inputs will turn off all four transistors of the output H-bridge, which results in a rapidly
decreasing output current to zero.
Figure 8. Typical thermal resistance vs. PC
Board copper area and suggested layout
b
s
= 1 / ( 0.77 • R
80
70
60
50
40
30
20
Choose the blanking pulse time to be longer than the duration of the switching transients by selecting a proper C
= 210 • C
As the filtering action introduces a small delay, the peak value across the sensing resistor, and hence the peak
Sometimes it may be necessary to include an external in the feed back loop, the filtering may be done by adding
To create an absolute zero current, the Dis input should be HIGH.
Thermal resistance [ C/W]
PLCC package
DIP package
5
T
PCB copper foil area [cm ]
value may vary from approximately 2 200 pF to 33 000 pF, a blanking time ranging from 0.5 s to 7 s is
T
10
[s]
15
T
• C
20
T
)
25
2
30
35
28-pin
22-pin
PLCC
24-pin
EMP
DIP
Figure 9. Stepping modes
Phase
Phase
Dis
Dis
–100%
–140%
–100%
–140%
V
140%
100%
V
140%
100%
I
140%
100%
I
140%
100%
MA1
MA2
R1
R2
1
2
2
1
A
T
. The value of R
into pin M
Full step mode
T
S
.
and C
B
. A logic LOW gives a current flow in
T
at the RC-pin. As C
T
Half step mode
is limited to 2 - 20 kohm. The
NJM3773
Modified half step mode
T
sets the digital
T