MC100EP210S ON Semiconductor, MC100EP210S Datasheet - Page 4

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MC100EP210S

Manufacturer Part Number
MC100EP210S
Description
Dual Differential LVDS Compatible Clock Driver
Manufacturer
ON Semiconductor
Datasheet

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NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
2. Input and output parameters vary 1:1 with V
3. All loading with 100 W across LVDS differential outputs.
4. V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
5. Measured with 400 mV source, 50% duty cycle clock source. All loading with 100 W across differential outputs.
6. Skew is measured between outputs under identical transitions of similar paths through a device.
7. Device−to−Device skew for identical transitions at identical V
8. Duty cycle skew guaranteed only for differential operation measured from the cross point of the input to the cross point of the output.
Table 4. DC CHARACTERISTICS
Table 5. AC CHARACTERISTICS
I
V
V
V
R
I
I
f
LVPECL
t
t
t
t
V
t
Symbol
EE
IH
IL
maxLVDS/
PLH
PHL
skew
JITTER
r
/t
OH
OL
IHCMR
T
PP
input signal.
f
Symbol
IHCMR
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
min varies 1:1 with V
Power Supply Current
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
Internal Termination Resistor
Input HIGH Current
Input LOW Current
Maximum Frequency
(See Figure 2. F
Propagation Delay
Within−Device Skew (Note 6)
Device−to−Device Skew (Note 7)
Duty Cycle Skew (Note 8)
RMS Random Clock Jitter
Minimum Input Swing
Output Rise/Fall Time (20%−80%)
Characteristic
Characteristic
EE
, V
max
IHCMR
/JITTER)
V
V
CC
CC
max varies 1:1 with V
= 2.5 V, V
= 2.375 to 2.625 V, V
CC
CLK
CLK
.
EE
1250
−150
−150
Min
800
1.2
43
= 0 V (Note 2)
http://onsemi.com
MC100EP210S
Min
425
150
50
CC
CC
−40°C
1400
Typ
150
950
EE
. The V
−40°C
levels.
Typ
525
800
130
> 1
0.2
20
85
80
4
= 0 V (Note 5)
IHCMR
1550
1100
Max
200
150
150
150
2.5
57
1200
Max
625
160
100
200
< 1
25
range is referenced to the most positive side of the differential
1250
−150
−150
Min
800
1.2
43
Min
450
150
75
25°C
1400
Typ
150
950
50
25°C
Typ
550
800
150
> 1
0.2
20
85
80
1550
1100
Max
200
150
150
150
2.5
1200
57
Max
650
160
100
225
< 1
25
1250
−150
−150
Min
800
1.2
Min
475
150
43
80
85°C
1400
85°C
Typ
150
950
Typ
575
800
160
> 1
0.2
20
85
80
1200
Max
1550
1100
Max
675
160
100
230
200
150
150
150
< 1
2.5
35
57
Unit
GHz
Unit
mV
mA
mV
mV
ps
ps
ps
ps
mA
mA
V
W

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