MC14510B Motorola, MC14510B Datasheet

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MC14510B

Manufacturer Part Number
MC14510B
Description
BCD Up/Down Counter
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
BCD Up/Down Counter
MOS P–channel and N–channel enhancement mode devices in a monolithic
structure. The counter consists of type D flip–flop stages with a gating
structure to provide type T flip–flop capability.
Preset inputs (P1, P2, P3, P4) and then bringing the Preset Enable (PE)
high. The direction of counting is controlled by applying a high (for up
counting) or a low (for down counting) to the UP/DOWN input. The state of
the counter changes on the positive transition of the clock input.
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q1, Q2, Q3, Q4) can be reset to a low state by applying a high to the
Reset (R) pin.
Other applications include: (1) Frequency synthesizer applications where
low power dissipation and/or high noise immunity is desired, (2) Analog–to–
digital and digital–to–analog conversions, and (3) Magnitude and sign
generation.
* Maximum Ratings are those values beyond which damage to the may occur.
†Temperature Derating:
X = Don’t Care
NOTE: When counting up, the Carry Out signal is normally high, and is low only
REV 3
1/94
MAXIMUM RATINGS*
V in , V out
Symbol
Carry In
MOTOROLA CMOS LOGIC DATA
I in , I out
The MC14510B synchronous up/down BCD counter is constructed with
This counter can be preset by applying the desired value in BCD to the
Cascading can be accomplished by connecting the Carry Out to the
This CMOS counter finds primary use in up/down and difference counting.
Motorola, Inc. 1995
V DD
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Speed
Logic Edge–Clocked Design — Count Occurs on Positive Going Edge
of Clock
Asynchronous Preset Enable Operation
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range.
T stg
P D
T L
Plastic “P and D/DW” Packages: – 7.0 mW/
Ceramic “L” Packages: – 12 mW/
X
X
1
0
0
when Q1 and Q4 are high and Carry In is low. When counting down, Carry
Out is low only when Q1 through Q4 and Carry In are low.
DC Supply Voltage
Input or Output Voltage (DC or Transient)
Input or Output Current (DC or Transient),
per Pin
Power Dissipation, per Package†
Storage Temperature
Lead Temperature (8–Second Soldering)
Up/Down
X
1
0
X
X
(Voltages Referenced to V SS )
Enable
Preset
Parameter
X
0
0
0
1
TRUTH TABLE
_
C From 100
Reset
0
0
0
0
1
_
C From 65
_
Clock
C To 125
X
X
X
– 0.5 to V DD + 0.5
– 0.5 to + 18.0
_
– 65 to + 150
C To 125
_
C
Value
500
260
Count Down
No Count
Count Up
10
Action
Preset
Reset
_
C
Unit
mW
mA
_
_
V
V
C
C
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V in and V out should be constrained
to the range V SS
appropriate logic voltage level (e.g., either V SS
or V DD ). Unused outputs must be left open.
This device contains protection circuitry to
Unused inputs must always be tied to an
T A = – 55 to 125 C for all packages.
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
10
15
12
13
MC14510B
1
5
9
4
3
BLOCK DIAGRAM
PE
CARRY IN
R
UP/DOWN
CLOCK
P1
P2
P3
P4
V DD = PIN 16
V SS = PIN 8
v
(V in or V out )
CARRY
OUT
Q1
Q2
Q3
Q4
CASE 751B
CERAMIC
CASE 620
CASE 648
D SUFFIX
L SUFFIX
P SUFFIX
PLASTIC
Plastic
Ceramic
SOIC
SOIC
v
MC14510B
6
11
14
2
7
V DD .
351

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MC14510B Summary of contents

Page 1

... MOTOROLA www.DataSheet4U.com SEMICONDUCTOR TECHNICAL DATA BCD Up/Down Counter The MC14510B synchronous up/down BCD counter is constructed with MOS P–channel and N–channel enhancement mode devices in a monolithic structure. The counter consists of type D flip–flop stages with a gating structure to provide type T flip–flop capability. ...

Page 2

... The formulas given are for the typical characteristics only at 25 †To calculate total supply current at loads other than 50 pF (50 pF – 50) Vfk where (per package pF – volts kHz is input frequency, and k = 0.001. MC14510B 352 (Voltages Referenced – ...

Page 3

... MC14510B 353 ...

Page 4

... PROGRAMMABLE GENERATOR CARRY IN OR UP/DOWN CLOCK PRESET ENABLE Q1 OR CARRY OUT RESET MC14510B 354 500 CARRY UP/DOWN PULSE CLOCK Q3 GENERATOR CARRY P4 OUT 90% 50% CLOCK 10% VARIABLE WIDTH Figure 1. Power Dissipation Test Circuit and Waveform ...

Page 5

... MOTOROLA CMOS LOGIC DATA LOGIC DIAGRAM STATE DIAGRAM FOR DOWN COUNTING MC14510B 355 ...

Page 6

... C in L.S.D. CLOCK CLOCK MC14510B U/D U THUMBWHEEL SWITCHES (OPEN FOR “0”) Figure 3. Presettable Cascaded 8–Bit Up/Down Counter TERMINAL C out COUNT M.S.D. INDICATOR MC14510B RESISTORS = 10 k MOTOROLA CMOS LOGIC DATA ...

Page 7

... TIMING DIAGRAM FOR THE PRESETTABLE CASCADED 8–BIT UP/DOWN COUNTER PRESET ENABLE DOWN COUNT DOWN COUNT UP COUNT UP COUNT MC14510B RESET 357 ...

Page 8

... C out C in L.S.D. CLOCK CLOCK MC14510B U/D U THUMBWHEEL SWITCHES (OPEN FOR “0”) Figure 4. Programmable Cascaded Frequency Divider BUFFER out M.S.D. MC14510B RESISTORS = out = n MOTOROLA CMOS LOGIC DATA f out ...

Page 9

... DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7. 0.020 0.040 0.51 1.01 MC14510B 359 ...

Page 10

... DIM MIN MAX MIN MAX F A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 are registered MOTOROLA CMOS LOGIC DATA MC14510B/D *MC14510B/D* ...

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