MC145407 Motorola, MC145407 Datasheet - Page 5

• Manufacturer Part Number: MC145407
• Description: 5 Volt Only Driver / Recevier
• Manufacturer: Motorola

MOTOROLA
RECEIVERS
DO1 – DO3
DRIVERS
Rx1 – Rx3
Tx1 – Tx3
DI1 – DI3
DRIVERS
Tx1 – Tx3
Figure 1. Power–Off Source Resistance
15
13
11
SLEW RATE (SR) =
t PHL
Figure 3. Slew Rate Characterization
Figure 2. Switching Characteristics
17
DI1
DI2
DI3
90%
V SS GND
V DD V CC
4
t SLH
– 3 V
50%
90%
2
3 V
50%
Tx1
Tx2
Tx3
50%
19
10%
t PHL
6
8
10
t f
– 3 V – (3 V)
10%
t f
t SLH
t PLH
R out =
OR
V in
I
3 V – ( – 3 V)
t PLH
3 V
t SHL
t r
– 3 V
V in = 2 V
t SHL
t r
V OL
+ 3 V
0 V
V OH
V OH
V OL
3 V
0 V
V CC
Digital Power Supply (Pin 19)
er supply. This pin should have a 0.33
ground.
GND
Ground (Pin 2)
ground pin of the EIA–232–E connector (Pin 7) as well as to
the logic power supply ground.
V DD
Positive Power Supply (Pin 17)
and the positive power supply input of the driver/receiver
sections of the device. This pin requires an external storage
capacitor to filter the 50% duty cycle voltage generated by
the charge pump.
V SS
Negative Power Supply (Pin 4)
inverter and the negative power supply input of the driver/re-
ceiver sections of the device. This pin requires an external
storage capacitor to filter the 50% duty cycle voltage gener-
ated by the charge pump.
C2+, C2–, C1–, C1+
Voltage Doubler and Inverter (Pins 1, 3, 18, 20)
and inverter, which generate the V DD and V SS voltages.
Rx1, Rx2, Rx3
Receive Data Input (Pins 5, 7, 9)
between + 3 and + 25 V is decoded as a space and causes
the corresponding DO pin to swing to ground (0 V). A voltage
between – 3 and – 25 V is decoded as a mark, and causes
the DO pin to swing up to V CC .
DO1, DO2, DO3
Data Output (Pins 16, 14, 12)
from V CC to GND. Each output pin is capable of driving one
LSTTL input load.
DI1, DI2, DI3
Data Input (Pins 15, 13, 11)
ers. Input voltage levels on these pins must be between V CC
and GND.
Tx1, Tx2, Tx3
Transmit Data Output (Pins 6, 8, 10)
which swing toward V DD and V SS. A logic 1 at a DI input
causes the corresponding Tx output to swing toward V SS . A
logic 0 causes the output to swing toward V DD . The actual
levels and slew rate achieved will depend on the output load-
ing (R L
The digital supply pin, which is connected to the logic pow-
Ground return pin is typically connected to the signal
This is the positive output of the on–chip voltage doubler
This is the negative output of the on–chip voltage doubler/
These are the connections to the internal voltage doubler
These are the EIA–232–E receive signal inputs. A voltage
These are the receiver digital output pins, which swing
These are the high impedance digital input pins to the driv-
These are the EIA–232–E transmit signal output pins,
ø
C L ).
PIN DESCRIPTIONS
F capacitor to
MC145407
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