NCV7361A ON Semiconductor, NCV7361A Datasheet - Page 19

• Manufacturer Part Number: NCV7361A
• Description: Voltage Regulator
• Manufacturer: ON Semiconductor

40% and 60% of the output voltage swing (linear region).
The output voltage swing is the difference between
dominant and recessive bus voltage.
until the upper and lower voltage swing limits:
determined by the slew rate control of the transmitter:
network time constant and the slew rate control, because
it’s a passive edge. In case of low battery voltages and high
bus loads the rising edge is only determined by the network.
If the rising edge slew rate exceeds the value of the
dominant one, the slew rate control determines the rising
edge.
Power Dissipation and Operating Range
resistance of the package and the PCB, the temperature
difference between Junction and Ambient as well as the
airflow.
on the transceiver configuration and its parameters as well
as on the bus voltage V
termination resistance R
the bit rate. Figure 28 shows the dependence of power
dissipation of the transmitter as function of V
conditions for calculation the power dissipation was:
R
on TxD of 50%.
L
The slew rate of the bus voltage is measured between
The slope time is the extension of the slew rate tangent
The slope time of the recessive to dominant edge is directly
The dominant to recessive edge is influenced from the
The max power dissipation depends on the thermal
The power dissipation can be calculated with:
The power dissipation of the transmitter P
BUS
= 500 W, C
V
BUS
P D + (V SUP * V OUT ) * I VOUT ) P D_TX
dV dt + 0.2 * V swing (t 40% −t 60% )
L
t slope + 5 * (t 40% −t 60% )
= 10 nF, Bitrate = 20 kbit and duty cycle
t slope + V swing dV dt
L
BUS
, the capacitive bus load C
= V
40%
BAT
t
sdom
100%
95%
0%
− V
MIN/MAX SLOPE TIME CALCULATION
D
Figure 27. Slope Time Calculation
, the resulting
D_TX
SUP
depends
http://onsemi.com
. The
L
and
NCV7361A
19
V
dom
calculated:
calculated the max output current IV
and ambient, and R
package. The thermal energy is transferred via the package
and the pins to the ambient. This transfer can be improved
with additional ground areas on the PCB as well as ground
areas under the IC.
The permitted package power dissipation can be
If we consider that P
T
50
45
40
35
30
25
20
15
10
5
0
J
−T
5
Figure 28. Power Dissipation LIN Transceiver
I VOUTmax +
A
6
is the temperature difference between junction
7
8
5%
P Dmax +
9
T J −T A
R qJ − A
th
10
60%
@ 20 kbit
is the thermal resistance of the
D_TX_max
* P D_TX_max @ VSUP
t
11
srec
V
SUP
VSUP * VOUT
12
T J * T A
R qJ − A
(V)
13
= f(V
OUT
14
15
SUP
on V
16
), it can be
OUT
17
:
18
19