SDA5650X Siemens, SDA5650X Datasheet
SDA5650X
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SDA5650X Summary of contents
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ICs for Consumer Electronics VPS / PDC-plus Decoder SDA 5650/X Data Sheet 02.97 ...
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... Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components 1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems 2 with the express written approval of the Semiconductor Group of Siemens AG critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system affect its safety or effectiveness of that device or system ...
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... BDSP 8/30 Format 2 Bit Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.9 Data Format of Programme Delivery Data in the Dedicated TV Line (VPS Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2 Purchase of Siemens I C components conveys the license under the Philips the I C system provided the system conforms to the I Semiconductor Group 2 C Bus and Bit Allocation ...
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VPS / PDC-plus Decoder 1 General Description The PDC plus SDA 5650 decoder chip receives all VPS and 8/30 Format 1 and 2 data together with the teletext header information for easy identification of broadcast transmitter. The SDA 5650 includes ...
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Pin Configurations P-DIP-14-1 Figure 1 Semiconductor Group P-DSO-20-1 5 SDA 5650/X 02.97 ...
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Pin Description Pin No. Symbol Function P-DIP-14-1 P-DSO-20 SSA 2 V SSD 3, 8, 13 SCL 3 5 SDA 4 6 CS0 5 7 VCS 6 9 DAVN 7 10 ...
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Block Diagram Figure 2 Semiconductor Group 7 SDA 5650/X 02.97 ...
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System Description 2.1 Functions Referring to the functional block diagram of the PDC / VPS decoder, the composite video signal with negative going sync pulses is coupled to the pin CVBS through a capacitor which is used for clamping ...
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In VPS mode, the extracted data bits of TV line no. 16 are checked for biphase errors. With no biphase errors encountered, the acquired bytes are stored in the transfer 2 register to the I C Bus. That transfer is ...
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Chip Address There are two pairs of chip addresses, which are selected by the CS0-input pin according to the following table: CS0 Input Low High 2.2.3 Write Mode For writing to the PDC decoder, the following format has to ...
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Control Register: Bit Number Default: All bits are set power-up. Bits 4 through 7 are used for test purposes and must not be changed for normal operation by user software! Bit 0: determines, ...
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Read Mode For reading from the PDC decoder, the following format has to be used Start Chipaddress Read Mode AS 1st Byte AM ..... Last Byte NAM Stop The contents registers (bytes) can be read ...
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Order of Data Output on the I Operating Modes 2 C Bus I Byte 1 bit Byte 2 bit Byte 3 bit ...
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Order of Data Output on the I Operating Modes (cont’ Bus I Byte 5 bit Byte 6 bit Byte 7 bit ...
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Order of Data Output on the I Operating Modes (cont’ Bus I Byte 9 bit Byte 10 bit Byte 11 bit ...
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Order of Data Output on the I Operating Modes (cont’ Bus I Byte 12 bit Byte 13 bit7 Message bit numbers ...
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Order of Data Output on the I Time Mode (MAB= Bus I Byte 1 bit Byte 2 bit Byte 3 ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 5 bit Byte 6 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 9 bit Byte 10 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 13 bit Byte 14 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 1 bit Byte 2 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 5 bit Byte 6 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 9 bit Byte 10 bit Byte ...
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Order of Data Output on the I Time Mode (MAB=0) (cont’ Bus I Byte 13 bit Byte 14 bit Byte ...
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Description of DAVN and EHB Outputs DAVN (Data Valid active low) EHB (First Field active high) Signal Output VPS Mode DAVN H/L-transition in line 16 when (set low) valid VPS data is received L/H-transition at the start of (set ...
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Electrical Characteristics Absolute Maximum Ratings Parameter Ambient temperature Storage temperature Total power dissipation Power dissipation per output Input voltage Supply voltage Thermal resistance Note: Maximum ratings are absolute ratings; exceeding any one of these ...
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Electrical Characteristics Parameter Symbol Input Signals SDA, SCL, CS0 V H-input voltage IH V L-input voltage IL C Input capacitance I I Input current IM Input Signal TI V H-input voltage IH V L-input voltage ...
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Electrical Characteristics (cont’ Parameter Symbol Output Signals DAVN, EHB, VCS V H-output voltage QH V L-output voltage QL Output Signals SDA (Open-Drain-Stage) V L-output voltage QL Permissible output voltage PLL-Loop Filter Components (see application circuit) ...
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Figure 3 2 C-Bus Timing I Parameter Clock frequency Inactive time prior to new transmission start-up Hold time during start condition Low-period of clock High-period of clock Set-up time for data Rise time for SDA and SCL signal Fall time ...
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PDC/VPS-Receiver Figure 4 Semiconductor Group 30 SDA 5650/X 02.97 ...
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Appendix 5.1 Control Register Write (I Figure 5 5.2 Data Register Read (I Figure 6 Semiconductor Group 2 C-Bus Write) 2 C-Bus Read) 31 SDA 5650/X 02.97 ...
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DAVN and EHB Timing Figure 7 Semiconductor Group 32 SDA 5650/X 02.97 ...
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Position of Teletext and VPS Data Lines within the Vertical Blanking Interval Figure 8 5.5 Definition of Voltage Levels for VPS Data Line Figure 9 Semiconductor Group 33 SDA 5650/X 02.97 ...
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BDSP 8/30 Format 1 Bit Allocation Byte No Weight – 2 – MJD Digit 4 Weight 10 17 MJD Digit 2 Weight 10 18 MJD Digit 0 ...
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Structure of the Teletext Data Packet 8/30 Format 2 Figure 10 : 5.8 BDSP 8/30 Format 2 Bit Allocation The four message bits of byte 13 are used as follows byte 13 bit 0 – LCI 1 – LCI ...
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BDSP 8/30 Format 2 Bit Allocation (cont’d) The message bits of bytes 14-25 are used in a way similar to the coding of the label in the dedicated television line as follows: byte 14 bit 0 PCS 1 PCS ...
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BDSP 8/30 Format 2 Bit Allocation (cont’d) byte 20 bit 0 PIL 1 PIL 2 PIL 3 PIL byte 21 bit 0 PIL 1 PIL 2 CNI 3 CNI byte 22 bit 0 CNI 1 CNI 2 CNI 3 ...
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Data Format of Programme Delivery Data in the Dedicated TV Line (VPS) Figure 11 Semiconductor Group 38 SDA 5650/X 02.97 ...
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Figure 12 Semiconductor Group 39 SDA 5650/X 02.97 ...
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Package Outlines P-DIP-14-1 (Plastic Dual In-line Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Semiconductor Group 40 SDA 5650/X Dimensions in mm 02.97 ...
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P-DSO-20-1 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 41 SDA 5650/X Dimensions in mm 02.97 ...