MB15F03 Fujitsu Microelectronics, Inc., MB15F03 Datasheet
MB15F03
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MB15F03 Summary of contents
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... PLL Frequency Synthesizer MB15F03 DESCRIPTION The Fujitsu MB15F03 is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2.0GHz and a 500MHz prescalers. A 64/ 128/129 for the 2.0GHz prescaler, and a 16/ 32/33 for 500MHz prescaler can be selected that enables pulse swallow operation. The latest BiCMOS process technology is used, resuItantly a supply current is limited as low as 9.0mA typ supply voltage of 3 ...
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... MB15F03 PIN ASSIGNMENTS SSOP-16 pin BCC-16 pin 2 GND Clock OSCin Data GND IF fi TOP fi VIEW 5 12 Vcc Vcc Xfin LD/fout (FPT-16P-M05) GND Clock OSCin 1 14 Data ...
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... A data is transferred to the corresponding latch (IF-ref counter, IF-Prog. counter, RF-ref. counter, RF-prog. counter) according to the control bit in a serial data. Clock input for the 23-bit shift register (with the schmitt trigger circuit.) One bit data is shifted into the shift register on a riging edge of the clock. MB15F03 3 ...
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... MB15F03 BLOCK DIAGRAM 3-bit latch Intermittent mode 7 control PS LDS SW IF (IF–PLL) Prescaler (IF–PLL) fi 16/17,32/33 2-bit latch T1 2 OSCin OR T1 2-bit latch Prescaler fi (RF–PLL) 64/65, 11 128/129 Xfin RF LDS SW Intermittent PS mode 10 RF control 3-bit latch (RF–PLL) Schmitt LE Latch selector 14 circuit Schmitt ...
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... Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand. Symbol Rating V –0 –0 +0 –0 +0 –55 to +125 STG Value Symbol Min Typ V 2.7 3 GND – –40 – MB15F03 Unit Remark Unit Note Max 3 CCIF CCRF + ...
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... MB15F03 ELECTRICAL CHARACTERISTICS Parameter Symbol Power supply current *1 Power saving current fin IF Operating fin RF frequency OSCin fin Vfin IF Input sensitivity fin Vfin RF OSCin Data, Clock, LE Input voltage Data, Clock, LE Input current PS RF OSCin LD/fout Output voltage ...
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... Divide ratio setting bits for the programmable reference counter (5 to 16,383) T1 Test purpose bit NOTE: Data input with MSB first. 127) Destination of serial data Data MB15F03 [Table. 1] [Table. 2] [Table ...
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... MB15F03 Programmable Counter CNT1 Control bit N1 to N14 : Divide ratio setting bits for the programmable counter (5 to 2,047 Divide ratio setting bits for the swallow counter (0 to 127) ...
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... SW = ”H” IF-PLL 16/17 Prescaler divide ratio RF-PLL 64/ ”L” 32/33 128/129 MB15F03 ...
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... MB15F03 Table. 7 Phase Comparator Phase Switching Data Setting > < VCO polarity (1) Note High–impedance Depending upon the VCO and LPF polarity, FC bit should be set. Table. 8 LD/fout Output Select Data Setting LDS LD/fout output signal H fout ( ...
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... < 16/fosc: i.e. t < 1250ns when foscin = 12.8 MHz RF–PLL section Locking state / Power saving state Unlocking state Locking state / Power saving state Unlocking state or more less and continues for three cycles or more. WL MB15F03 LD output ...
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... MB15F03 POWER SAVING MODE (INTERMITTENT MODE CONTROL CIRCUIT) Setting a PS pin to Low, IF-PLL (RF-PLL) enters into power saving mode resultant current consumption can IF(RF) be limited (typ.). Setting PS pin to High, power saving mode is released so that the device works normally. In addition, the intermittent operation control circuit is included which helps smooth start up from stand by mode. ...
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... MHz (–2dB) 3000 2000 fin (MHz) Ref. counter div. ratio=2048 IF: fin=268 MHz ( RF: fin=1624 MHz (V ), Xfin: 1000 pF Pull Down CO 150 100 fosc (MHz) MB15F03 VCC=2.7 V VCC=3.0 V VCC=3.6 V 2000 VCC=2.7 V VCC=3.0 V VCC=3.6 V 4000 VCC=2.7 V VCC=3.0 V VCC=3.6 V 200 (Continued) ...
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... MB15F03 (Continued) Do output Current 3.600 .3600 /div .0000 .0000 3.000 .3000 /div .0000 .0000 14 Conditions +25 C 3 2.000/div I (mA 2.000/div I (mA 2.7, 3.0, 3 (mA) –20.00 3.6 V (mA) 20.00 (Continued) ...
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... MHz 052.75 –4.903 k 2.536 pF 12.800 000 MHz MB15F03 735 –743.59 50 MHz 92.609 –344.72 200 MHz 34.313 –200.26 21.984 –134.74 500 MHz 12.24 –52.355 1 GHz 21.283 7.4053 2 GHz 37.324 k –5.214 k 1 MHz 084 ...
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... MB15F03 REFERENCE INFORMATION Typical plots measured with the test circuit are shown below. Each plot shows lock up time, phase noise and reference leakage. PLL Lock Up Time = 460 s (1797.6 MHz 1872.4 MHz, within MKr x : 460.02316 –74.7998 MHz 30.00500 MHz 2.000 kHz/div 29 ...
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... TEST CIRCUIT (Prescaler Input/programmable Reference Divider Input Sensitivity Test) 1000pF P P.G 1000pF 50 Note: SSOP-16 pin Vcc IF 0 MB15F03 Controller (divide ratio setting) Vcc RF 1000pF 0.1 F MB15F03 fou Oscilloscope 1000pF P.G 50 GND ...
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... Clock, Data, LE: Schmitt trigger circuit is provided (insert a pull-down or pull-up resistor to prevent oscillation when open-circuited in the input). Note: SSOP-16 pin 18 OUTPUT VCO 3 V 1000 pF Clock Data LE fin Vcc MB15F03 OSC GND fin Vcc 1000 pF 1000 pF TCXO OUTPUT VCO LPF 0 ...
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... ORDERING INFORMATION Part number MB15F03 PFV MB15F03 PV Package 16 pin, Plastic SSOP (FPT-16P-M05) 16 pin, Plastic BCC (LCC-16P-M03) MB15F03 Remarks 19 ...
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... MB15F03 PACKAGE DIMENSIONS 16 pins, Plastic SSOP (FPT-16P-M05) * 5.00±0.10(.197±.004) INDEX 0.65±0.12 (.0256±.0047) 4.55(.179)REF 1994 FUJITSU LIMITED F16013S-2C These dimensions do not include resin protrusion. * 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) "A" +0.10 0.22 0.15 –0.05 +.004 .009 .006 – ...
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... OFF) Details of "A" part 0.75±0.10 (.030±.004) 0.40±0.10 (.016±.004) MB15F03 3.40(.134)TYP 0.65(.026)TYP 14 0.40±0.10 (.016±.004) 1.55(.061)TYP "A" "B" 1.725(.068) 1 TYP Details of " ...
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... MB15F03 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U ...