25C040 MicrochipTechnology, 25C040 Datasheet
25C040
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25C040 Summary of contents
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... Also, write operations to the device can be disabled via the write protect pin (WP). *25xx040 is used in this document as a generic part number for the 25AA040/25LC040/25C040 devices. SPI is a trademark of Motorola. 1997 Microchip Technology Inc. ...
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... 4. Timing Measurement Reference Level Input Output Note 1: For For + 1.8V to 5.5V AMB - + 1.8V to 5.5V AMB - +125 4.5V to 5.5V (25C040 only) AMB CC Min Max Units 2 0 < 2.7V (Note -0.3 0 ...
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... HZ 150 — ns 200 — ns 100 — 150 — ns 200 — ns — 10M — E/W Cycles Preliminary = 1.8V to 5.5V = 1.8V to 5.5V = 4.5V to 5.5V (25C040 only) Test Conditions V = 4. 2. 1. 4. 2. 1. 4. 2. 1. 4. ...
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... FIGURE 1-2: HOLD TIMING CS T SCK SO n+2 n+1 n+2 n+1 SI HOLD FIGURE 1-3: SERIAL INPUT TIMING CS T CSS Mode 1,1 Mode 0,0 SCK Tsu MSB in SO FIGURE 1-4: SERIAL OUTPUT TIMING SCK T V MSB out SO SI DS21204A-page high impedance n don’t care ...
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... SO pin is updated after the falling edge of the clock input. 1997 Microchip Technology Inc. 25AA040/25LC040/25C040 2.5 Write Protect (WP) This pin is a hardware write protect input pin. When WP is low, all writes to the array or status register are disabled, but any other operation functions normally ...
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... FUNCTIONAL DESCRIPTION 3.1 PRINCIPLES OF OPERATION The 25xx040 is a 512 byte Serial EEPROM designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC16C6X/7X micro- controllers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly with the software ...
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... SCK data byte 1997 Microchip Technology Inc. 25AA040/25LC040/25C040 lower address byte ...
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... Write Enable (WREN) and Write Disable (WRDI) The 25xx040 contains a write enable latch. Table 3-3 for the Write Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. ...
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... SI SO 1997 Microchip Technology Inc. 25AA040/25LC040/25C040 3.6 Write Status Register(WRSR) The WRSR instruction allows the user to select one of four levels of protection for the array by writing to the appropriate bits in the status register. The array is divided up into four segments. The user has the ability ...
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... Data Protection The following protection has been implemented to pre- vent inadvertent writes to the array: • The write enable latch is reset on power-up. • A write enable instruction must be issued to set the write enable latch. • After a byte write, page write, or status register write, the write enable latch is reset. • ...
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... PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. 25xx040 — /P Package: Temperature Range: Devices: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...
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W ORLDWIDE AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602-786-7200 Fax: 602-786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 ...