MAC7100CVF Motorola, MAC7100CVF Datasheet - Page 28

• Manufacturer Part Number: MAC7100CVF
• Description: MAC7100 Microcontroller Family Hardware Specifications
• Manufacturer: Motorola

6
7
8
9
10
Electrical Characteristics
1
2
3
4
3.10.4 ATD Timing Specifications
1
28
Num C
Num C
Num
U1
U2
U3
U4
T1
T2
T3
T4
T5
Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for
each 8 to 12 °C, in the ambient temperature range of 50 to 125 °C.
Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs
greater than V
presence of the sample amplifier. Other channels are not affected by non-disruptive conditions.
Coupling Ratio, K, is defined as the ratio of the output current, I
current, I
voltage error on the channel under test is calculated as Verr = I
Total injection current is determined by the number of channels injecting (for example, 15), external injection voltage
(V
the same values. To determine the error voltage on the converted channel, only the two adjacent channels are
expected to contribute to the error voltage: V
For a maximum sampling error of the input voltage ≤ 1LSB, then the external filter capacitor, C
value of C
V1
V2
V3
V4
All voltages referred to V
Note: 1 LSB = 1 Count (At V
These values include quantization error which is inherently 1/2 count for any A/D converter.
This value is based on error attributed to the specified leakage value of TBD nA resulting in an error of less than 1/2
LSB (2.5 mV). If operating conditions are less than worst case or leakage-induced error is acceptable, larger values
of source resistance is allowable.
Time prior to end of conversion that the ETRIG pin must be deactivated so that another conversion sequence does
not start.
INJ
D 10-bit Resolution
D 10-bit Differential Nonlinearity
D 10-bit Integral Nonlinearity
D 10-bit Absolute Error
D Max input Source Impedance
D ATD Module Clock Frequency
D ATD Conversion Clock Frequency
D ATD 10-bit Conversion Period
D Stop Recovery Time (V
– V
C
D ETRIG Minimum Period
D ETRIG Minimum Pulse Width
D ETRIG Level Recovery
D Conversion Start Delay
INJ
POSCLAMP
SAMP
, when both adjacent pins are overstressed with the specified injection current. K = I
RH
in the new design may be reduced, or increased slightly.
and 0x000 for values less than V
, or V
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
MAC7100 Microcontroller Family Hardware Specifications
INJ
SS
Table 32. ATD External Trigger Timing Specifications
Parameter
A, V
– V
Rating
Freescale Semiconductor, Inc.
REF
Rating
2, 3
Table 30. ATD Performance Specifications
NEGCLAMP
For More Information On This Product,
DD
DD
= 5.12 V, one 8 bit count = 20 mV, one 10-bit count = 5 mV)
A = 5.0 V)
1
A = 5.0 V±10%, ATD clock = 2.1 Mhz., –40 to 125 °C.
2
Table 31. ATD Timing Specifications
4
*
2
), and the external source impedance, Rs, wherein all input channels have
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Clock Cycles
errj
Conv. Time
= (V
RL
INJ
. This assumes that V
– V
T
Symbol
PERIOD
t
t
t
DLY
CLAMP
PW
LR
Symbol
N
T
Symbol
CONV10
DNL
F
LSB
CONV10
INL
AE
R
T
F
atdclk
INJ
OUT
S
SR
clk
) × K × 2.
x K x R
, measured on the pin under test to the injection
*
S
Min
–2.5
Min
Min
14
DD
0.5
—
—
.
–1
–2
—
—
—
—
2
1
7
*
A ≥ AV
1
RH
Typ
Typ
—
—
—
—
—
—
—
—
—
1 ATD clock
5
1 sample +
1 conv. +
and V
Max
—
—
2
f
RL
≥ 1024 × C
Max
25.0
Max
OUT
100
100
28
2.5
2.0
14
—
1
2
≥ V
*
÷ I
SS
MOTOROLA
INJ
A due to the
SYS CLK
SYS CLK
SYS CLK
CYCLE
. The input
Cycles
SAMP
Counts
Counts
Counts
Unit
MHz
MHz
µsec
µsec
Unit
Unit
mV
kΩ
. The
*