T5743 ATMEL Corporation, T5743 Datasheet
T5743
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T5743 Summary of contents
Page 1
... Programmable Digital Noise Suppression Description The T5743 is a multi-chip PLL receiver device supplied in an SO20 package. It has been especially developed for the demands of RF low-cost data transmission systems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well suited to operate with Atmel's PLL RF transmitter U2741B. Its main applications are in the areas of telemetering, security technology and keyless-entry systems ...
Page 2
... LF 13 LFGND 14 XTO T5743 SENS 19 2 IC_ACTIVE 18 3 CDEM 17 4 AVCC 5 16 TEST T5743 15 6 AGND 7 14 MIXVCC 8 13 LNAGND 9 12 LNA_IN 11 10 n.c. Function Sensitivity-control resistor IC condition indicator Low = sleep mode High = active mode Lower cut-off frequency data filter Analog power supply ...
Page 3
... Dem_out Demodulator and data filter RSSI Limiter out Sensitivity IF Amp reduction 4. Order LPF Standby logic 3 MHz IF Amp VCO LPF 3 MHz f LNA 64 Data DATA interface POLLING/_ON TEST Polling circuit and DATA_CLK control logic MODE FE CLK DVCC IC_ACTIVE LFGND LFVCC XTO XTO LF T5743 3 ...
Page 4
... RF Front-end T5743 4 The RF front-end of the receiver is a heterodyne configuration that converts the input signal into a 1 MHz IF signal. According to Figure 3, the front-end consists of an LNA (low-noise amplifier), LO (local oscillator), a mixer and an RF amplifier. The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO ...
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... Pin LNA_IN. The input impedance of that pin is provided in the electrical parame- ters. The parasitic board inductances and capacitances also influence the input matching. The RF receiver T5743 exhibits its highest sensitivity at the best signal-to- noise ratio in the LNA. Hence, noise matching is the best choice for designing the trans- formation network ...
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... L C3 LNA_IN 25n 47p C16 100p L3 = 315 MHz RF 47n L2 TOKO LL2012 F82NJ IN 1 B3551 IN 82n 2 IN_GND C2 CASE_GND 10p 3,4 7,8 = 315 MHz RF 8 LNAGND T5743 9 LNA_IN 33p 25n IN 3.3p 100p 39n TOKO LL2012 F39NJ C17 22p TOKO LL2012 F47NJ 5 OUT 6 OUT_GND 4569A–RKE–12/02 ...
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... MHz is used. For other RF input frequencies refer to Table 1 to determine RF the center frequency. The T5743 is available with two different IF bandwidths. T5743P3, the version with B = 300 kHz, is well suited for ASK systems where Atmel’s PLL transmitter U2741B is IF used. The receiver T5743P6 employs an IF bandwidth of B can be used together with the U2741B in ASK and FSK mode ...
Page 8
... Receiver’). The BR_Range must be set in accordance to the used baud rate. The T5743 is designed to operate with data coding where the DC level of the data signal is 50%. This is valid for Manchester and Bi-phase coding. If other modulation schemes are used, the DC level should always remain within the range 66% ...
Page 9
... When designing the system in terms of receiving bandwidth, the LO deviation must be considered as it also determines the IF center frequency. The total LO deviation is cal- culated to be the sum of the deviation of the crystal and the XTO deviation of the T5743. Low-cost crystals are specified to be within ±100 ppm. The XTO deviation of the T5743 is an additional deviation due to the XTO circuit. This deviation is specified to be ± ...
Page 10
... Polling Mode T5743 10 Figure 9. Generation of the Basic Clock Cycle T Divider :14/:10 XTO Pin MODE can now be set in accordance with the desired clock cycle T the following application relevant parameters: • Timing of the polling circuit including bit check • Timing of the analog and digital signal processing • ...
Page 11
... Pin POLLING/_ON, the receiver can be switched on and off Bit-check T Bit-check and the start-up time of a connected microcontroller + T Start_µC Clk is about XSleep Sleep T5743 ) Bit-check . It is Clk 11 ...
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... Output level on Pin IC_ACTIVE => high Output level on Pin IC_ACTIVE => high Output level on Pin IC_ACTIVE => high Son Son S Son OFF command OFF command OFF command T5743 12 Sleep: Sleep: Sleep: XSleep: XSleep: XSleep: ´ 1024 T ´ 1024 T ´ 1024 T Clk Clk Clk ...
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... In polling mode, the bit-check . Figure 11 shows an example where 3 bits are tested is in between the lower bit-check limit the check will be continued the bit check will be terminated and the receiver 1/f Sig Lim_min T Lim_max T5743 and Lim_min is smaller than ee and Lim_min 13 ...
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... Figure 14. Timing Diagram for Failed Bit Check (Condition: CV_Lim < Lim_min) ( Lim_min = 14, Lim_max = 24 ) IC_ACTIVE Bit check Dem_out Bit-check- 0 counter T Start-up Start-up mode T5743 14 = Lim_min ´ Lim_min XClk = (Lim_max –1) ´ Lim_max XClk Lim_min and Lim_max are defined by a 5-bit word each within the LIMIT register. ...
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... A higher value for N Bit-check requiring a higher value for the transmitter Bit-check , the receiver switches to Bit-check . This clock is also used for the bit-check XClk has elapsed. The edge-to-edge time XClk DATA_L_max T5743 Bit-check . A higher Clk Bit-check . XClk ³ This function is 15 ...
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... Dem_out Data_out (DATA) t DATA_min Figure 18. Steady L State Limited DATA Output Pattern After Transmission IC_ACTIVE Bit check Dem_out Data_out (DATA) Start-up mode T5743 DATA_min t ee Receiving mode Bit-check mode After the end of a data transmission, the receiver remains active. Depending on the bit Noise_Disable in the OPMODE register, the output signal at Pin DATA is high or ran- dom noise pulses appear at Pin DATA (see section “ ...
Page 17
... Note that the capacitive load at Pin DATA Sleep Sleep Sleep Sleep Sleep mode Sleep mode Start-up mode Sleep mode Start-up mode Start-up mode Sleep mode Start-up mode Bit check Bit-check mode Receiving mode T5743 Start-up Start-up Start-up Start-up 17 ...
Page 18
... Figure 21. Activating the Receiving Mode via Pin POLLING/_ON IC_ACTIVE POLLING/_ON Data_out (DATA) Serial bi-directional data line Data Clock T5743 18 t on1 Sleep mode Start-up mode Figure 20 illustrates how to set the receiver back to polling mode via Pin POLLING/_ON. The Pin POLLING/_ON must be held to low for the time period t ...
Page 19
... Receiving mode, data clock control logic active after the edge on Pin DATA (see figure Delay Data '0' '1' '1' '0' '1' ' Delay P_Data_Clk Receiving mode, data clock control logic active OR T > Lim_min_2T Lim_max_2T ee '1' '1' '0' '1' '0' Receiving mode, bit check active T5743 19 ...
Page 20
... Figure 24. Data Clock Disappears Because of a Logical Error Dem_out Data_out (DATA) DATA_CLK Figure 25. Output of the Data Clock After a Successful Bit Check Dem_out Data_out (DATA) DATA_CLK T5743 20 Data '1' '1' '1' '0' '1' '1' Receiving mode, data clock control logic active Data Bit check ok '1' ...
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... Pin DATA. The length of the pulse depends on the selected baud-rate range Delay1 Delay2 t t Delay P_Data_Clk 0, 0, Delay1 Delay2 t t Delay P_Data_Clk T5743 21 ...
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... Figure 30. Occurence of a Pulse at the End of the Data Stream Dem_out Data_out (DATA) DATA_CLK Controlled Noise Suppression by the Microcontroller (see Figure 31) T5743 22 Data Digital Noise Digital Noise Data Digital Noise Digital Noise Receiving mode, Receiving mode, ...
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... Start-up Receiving mode mode The T5743 receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT. The registers can be programmed by means of the bidirectional DATA port. If the register contents have changed due to a voltage drop, this condition is indicated by a certain output pattern called reset marker (RM). The receiver must be reprogrammed in that case ...
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... Bit 3 Bit 4 1 BR_Range 0 1 Baud1 Baud0 Default values Bit 3... Lim_ Lim_ min5 min4 Default values Bit 3...14 T5743 24 Bit 5 Bit 6 Bit 7 Bit 8 OFF-command OPMODE register Modu- N Bit-check lation ASK/_ BitChk1 BitChk0 Sleep4 Sleep3 FSK LIMIT register ...
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... T Sleep 0 = 12.72 ms) (default) T Sleep ... ... (Permanent sleep mode) Extension Factor for Sleep Time = Sleep × Xsleep × 1024 × Sleep Clk 1 (default) 8 Suppression of the Digital Noise at Pin DATA Noise suppression is inactive Noise suppression is active (default) T5743 ) Clk ) 25 ...
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... The T5743 implies an integrated power-on reset and brown-out detection circuitry to provide a mechanism to preserve the RAM register information. According to Figure 32, a power-on reset (POR) is generated if the supply voltage V drops below the threshold voltage V the configuration registers in that condition. Once V celled after the minimum reset period t voltage of the receiver is turned on ...
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... RM. V ThReset t Rst Bit 1 Bit 2 ("0") ("1") (Register- (Start bit) select) Programming frame Bit 14 Bit 15 ("0") ("0") (Poll8) (Stop bit) T Sleep T Start-up Start-up Sleep mode mode T5743 27 ...
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... 4 5 Input - Input - Interface Interface Data_In Data_In Data_out Data_out T5743 T5743 R R pup pup I/O DATA DATA 0 ... ... 20 V Serial bi-directional data line Serial bi-directional data line ...
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... B3 1 470 1 220 1 120 1 IC_ACTIVE Sensitivity reduction >= 1.6k DATA POLLING/_ON DATA_CLK Q1 C11 12p 6.7643MHz 2% np0 C8 150p 10% R1 820 5% C9 4.7n C10 T5743 at Pin DATA and L pup 29 ...
Page 30
... LFVCC np0 C12 C15 10n 150p 10% 10% C16 100p 5% np0 L2 TOKO LL2012 F39NJ 39n 5% = 433.92 MHz with SAW Filter R2 56k to 150k T5743 1 DATA 20 SENS C14 2 POLLING/_ON 19 IC_ACTIVE 3 DGND 18 CDEM DATA_CLK 17 33n 5% 4 MODE 16 AVCC 5 TEST C13 6 DVCC 15 AGND 10n ...
Page 31
... T amb P in_max Symbol R thJA IC_ACTIVE Sensitivity reduction >= 1.6k DATA POLLING/_ON DATA_CLK Q1 C11 15p 4.906MHz 2% np0 C8 150p 10% R1 820 5% C9 4.7n C10 Min. Max. 6 1000 150 -55 +125 -40 +105 10 Value 100 T5743 Unit V mW ° C ° C ° C dBm Unit K/W 31 ...
Page 32
... Minimum time BR_Range = period between edges at Pin BR_Range0 DATA BR_Range1 (see Figure 7, BR_Range2 Figure 17 and BR_Range3 Figure 18, with the exception of parameter T ) Pulse T5743 433.92 MHz and 6.76438 MHz Osc. (MODE: 1) Symbol Min. Typ. Max. Min. T 2.0383 Clk 2.0697 2 ...
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... Clk 63.5 ´ T 129 129 Clk 256 ´ T 522 522 Clk 512 ´ T 1044 Clk 64 ´ T 130 521 Clk T5743 Max. Unit 130 ´ T µs XClk 130 ´ T µs XClk 130 ´ T µs XClk 130 ´ T µs XClk 10.5 ´ T µs Clk µ ...
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... Parameters Current consumption LNA Mixer (Input Matched According to Figure 6) Third-order intercept point LO spurious emission Noise figure LNA and mixer (DSB) LNA_IN input impedance 1 dB compression point (LNA, mixer, IF amplifier) T5743 6.76438 MHz Osc. (MODE: 1) Symbol Min. Typ. ...
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... VCO B 100 Loop C LF_tot f -30 ppm f +30 ppm XTO XTAL Ref_ASK -109 -111 -107 -109 -106 -108 -104 -106 T5743 Max. Unit -22 dBm -20 dBm 449 MHz -90 dBC/Hz -110 dBC/Hz -47 dBC MHz/V kHz 10 nF MHz W 150 W 220 6.5 pF -113 dBm ...
Page 36
... V amb S Sensitivity variation ASK for full operating range including IF-filter = 25 ° compared amb S Input sensitivity FSK 300 kHz IF-filter T5743 433.92 MHz and Test Conditions Input matched according to Figure 6 ASK (level of carrier) BER £ ...
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... D P Ref + Ref +8 + Ref +8 +11 SNR ASK SNR FSK DR 60 RSSI 0.11 0.16 f cu_DF 39 22 CDEM 12 8.2 T5743 Max. Unit -105.5 dBm -105.5 dBm -103.5 dBm -103.5 dBm -102 dBm -102 dBm -100 dBm -100 dBm -1 ...
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... Upper cut-off frequency data filter Reduced sensitivity Reduced sensitivity variation over full operating range Reduced sensitivity variation for different values of R Sense Threshold voltage for reset T5743 433.92 MHz and Test Conditions BR_Range0 (default) BR_Range1 ...
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... V V ich -0 -0. -0 -0. 0.2 ´ 0.8 ´ 0.2 ´ 0.8 ´ 0.2 ´ T5743 Max. Unit 0 µ ° 0 0 ...
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... Extended Type Number T5743P3-TG T5743P3-TGQ T5743P6-TG T5743P6-TGQ Package Information Package SO20 Dimensions in mm 0.4 1. T5743 40 Package Remarks SO20 Tube, IF bandwidth of 300 kHz SO20 Taped and reeled, IF bandwidth of 300 kHz SO20 Tube, IF bandwidth of 600 kHz SO20 Taped and reeled, IF bandwidth of 600 kHz 12 ...
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... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...