SC28C94 Philips Semiconductors, SC28C94 Datasheet - Page 13

• Manufacturer Part Number: SC28C94
• Description: Quad universal asynchronous receiver/transmitter QUART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 4.
MR0 (Mode Register 0)
MR1 (Mode Register 1)
NOTE: *In block error mode, block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
MR2 (Mode Register 2)
NOTE: Add 0.5 to values shown above for 0–7, if channel is programmed for 5 bits/char.
CSR (Clock Select Register)
CR (Command Register)
NOTE: Issuing commands contained in the upper four bits of the “Command Register” should be separated in time by at least three (3) X1
clock edges. Allow four (4) edges if the “X1 clock divide by 2” mode is used. A disabled transmitter cannot be loaded.
SR (Status Register)
NOTE: These status bits are appended to the corresponding data character in the receive FIFO. A read of the status register provides these
bits [7:5] from the top of the FIFO together with bits [4:0]. These bits are cleared by a reset error status command. Unless reset with the ‘Error
Reset’ (CR command 40) or receiver reset, these bits will remain active in the Status Register after the RxFIFO is empty. In block error mode,
block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
ACR (Auxiliary Control Register)
1998 Aug 19
Bit 7
0 = No
1 = Yes
00 = Normal
01 = Auto-echo
10 = Local loop
11 = Remote loop
Rx Watchdog
Rec’d. Break
Quad universal asynchronous receiver/transmitter (QUART)
BRG Set
0 = set 1
1 = set 2
Control
1 = Yes
RxRTS
0 = No
Select
Timer
0 = off
1 = on
*
Channel Mode
Register Bit Formats, Duart ab. [duplicated for Duart cd]
Bit 6
Normally set to 0
RxINT1 Select
Framing Error
RxINT2 bit
Miscellaneous Commands
1 = Yes
0 = No
Receiver Clock Select
These bits should normally be set to 0
*
See text
See text
Mode and Source
Bit 5
0 = Char
1 = Block
0 = No
1 = Yes
Counter/Timer
Error Mode*
Parity Error
See text
Control
1 = Yes
TxRTS
0 = No
*
TxINT Control
Bit 4
00 = With parity
01 = Force parity
10 = No parity
11 = Wake-up mode
0 = No
1 = Yes
Overrun Error
CTS Enable Tx
1 = Yes
0 = No
Parity Mode
13
0 = No
1 = Yes
Bit 3
0 = 0.563 4 = 0.813 8 = 1.563 C = 1.813
1 = 0.625 5 = 0.875 9 = 1.625 C = 1.875
2 = 0.688 6 = 0.938 A = 1.688 E = 1.938
3 = 0.750 7 = 1.000 B = 1.750 F = 2.000
Disable Tx
TxEMT
1 = Yes
0 = off
1 = on
0 = No
Delta
I/O1b
x
They should be considered Reserved.
0 = No
1 = Yes
Bit 2
0 = Even
1 = Odd
These bits not implemented.
Parity Type
Enable Tx
Transmitter Clock Select
TxRDY
1 = Yes
0 = No
0 = off
1 = on
Delta
I/O0b
x
Stop Bit Length*
See text
0 = No
1 = Yes
Bit 1
Disable Rx
RxFULL
1 = Yes
0 = No
0 = off
1 = on
Delta
I/O1a
00 = 5
01 = 6
10 = 7
11 = 8
x
Bits per Character
Product specification
SC28C94
0 = No
1 = Yes
Bit 0
Enable Rx
RxRDY
1 = Yes
0 = No
0 = off
1 = on
Delta
I/O0a
x