IDT7132SA Integrated Device Technology, IDT7132SA Datasheet - Page 12

• Manufacturer Part Number: IDT7132SA
• Description: High Speed 2k X 8 Dual Port Static Ram
• Manufacturer: Integrated Device Technology

Timing Waveform of Write with Port-to-Port Read and BUSY
NOTES:
1. To ensure that the earlier of the two ports wins. t
2. CE
3. OE = V
4. All timing is the same for the left and right ports. Port "A" may be either the left or right port. Port "B" is opposite from port "A".
Timing Waveform of Write with BUSY
NOTES:
1. t
2. BUSY is asserted on port "B" blocking R/W
3. t
4. All timing is the same for the left and right ports. Port 'A' may be either the left or right port. Port "B" is opposite from port "A".
DATA
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
DATA
ADDR
BUSY
WB
WH
ADDR
R/W
L
OUT"B"
applies only to the slave version (IDT7142).
must be met for both BUSY Input (IDT7142, slave) or Output (IDT7132, master).
= CE
IN"A"
IL
"A"
"B"
"B"
"A"
for the reading port.
R
= V
IL
BUSY
R/W
R/W
"B"
"B"
"A"
t
APS
"B"
(1)
, until BUSY
APS
is ignored for Slave (IDT7142).
"B"
goes HIGH.
t
BAA
t
WB
(3)
MATCH
t
WC
(2)
12
t
WP
(4)
t
WP
Military, Industrial and Commercial Temperature Ranges
MATCH
VALID
t
DW
t
t
t
WDD
WH
BDA
2692 drw 12
(1)
t
DDD
t
DH
t
BDD
,
(2,3,4)
VALID
2692 drw 11