IDT77V400 Integrated Device Technology, IDT77V400 Datasheet - Page 9

no-image

IDT77V400

Manufacturer Part Number
IDT77V400
Description
1.24 Gbps Switching Memory **not Recommended For New Designs**
Manufacturer
Integrated Device Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT77V400S155DS
Manufacturer:
IDT
Quantity:
21
Part Number:
IDT77V400S155DS
Manufacturer:
IDT
Quantity:
300
Part Number:
IDT77V400S155DS
Manufacturer:
IDT
Quantity:
6
Part Number:
IDT77V400S156BC
Manufacturer:
IDT
Quantity:
1 100
Part Number:
IDT77V400S156DS
Manufacturer:
IDT
Quantity:
1
' ' ' ' H H H H Y L F H , Q W H U I D F H
ATM cells to and from the PHY device. It is a master UTOPIA interface
and can operate with either an 8-bit or 16-bit data bus. Cell level hand-
shake is used to transfer cells over the UTOPIA interface, byte level
handshake is not supported.
bus. The DPI receive interface can be programmed to operate with the
clock as an input or output to accommodate either the IDT
SWITCHStAR or a normal mode DPI device.
IDT77V011
The 77V011 uses a UTOPIA level 2 interface to receive and transmit
The Data Path Interface (DPI) can be used with a 4-bit or 8-bit data
Y L F H , Q W H U I D F H
Y L F H , Q W H U I D F H
Y L F H , Q W H U I D F H
DRxCLK
DTxCLK
RCLK
TCLK
DPI
Receive
Interface
Serial
EEPROM
Interface
DPI
Transmit
Interface
System
Interface
Misc.
Interface
SYSCLK
SYSCLK/2
8-bit UTOPIA 2
DRxDATA[7:0]
4-bit DPI
DTxDATA[7:0]
Table 1 Clock Relationship and Frequency
DRxFRM
DTxFRM
S Y S R S T
SYSCLK
CNTRL_A
CNTRL_B
DRxCLK
DTxCLK
EEOUT
EECLK
E E C S
EEIN
Figure 2 77V011 Interfaces
SYSCLK
SYSCLK/4
IDT77V011
16-bit UTOPIA 2
9 of 43
4-bit DPI
tify cells. The EEPROM is an optional device and does not need to be
implemented.
the internal PHY registers during normal operation, and to program the
pin configurable registers at reset.
controlled through the registers.
The EEPROM holds information for initialization and Discovery/Iden-
The Management interface contains the control pins used to access
The Misc. Interface contains two output test pins that can be
P H Y R S T
P H Y I N T
RCLK
RSOC
R E N B
RxDATA[15:0]
RCLAV
RxADDR[4:0]
TCLK
TxREF
TSOC
T E N B
TxDATA[15:0]
TCLAV
TxADDR[4:0]
BMODE
MBUS[11:0]
MDATA[7:0]
MGMT[1]
MGMT[2]
MGMT[3]
MGMT[4]
MGMT[5]
TxPRTY
REFCLK
SYSCLK
SYSCLK
8-bit UTOPIA 2
5348drw04
8-bit DPI
UTOPIA
Receive
Interface
UTOPIA
Transmit
Interface
Managment
Interface
SYSCLK
SYSCLK/2
16-bit UTOPIA 2
8-bit DPI
March 15, 2001

Related parts for IDT77V400