UCC2880-6 Unitrode Semiconductor, UCC2880-6 Datasheet - Page 4

• Manufacturer Part Number: UCC2880-6
• Description: PentiumR Pro Controller
• Manufacturer: Unitrode Semiconductor

ELECTRICAL CHARACTERISTICS (cont.):
VD1 = VD2 = VD3 = 0V, 0°C < T
Note 1: This percentage is measured with respect to the ideal COMMAND voltage programmed by the D0 - D3 pins.
PIN DESCRIPTIONS (cont.)
CAM (Current Amplifier Inverting Input): The average
load current feedback from ISOUT is applied through a
resistor to this pin. The current loop compensation net-
work is also connected to this pin (see CAO below).
CAO (Current Amplifier Output): The current loop com-
pensation network is connected between this pin and
CAM. The voltage on this pin is the input to the PWM
comparator and regulates the output voltage of the sys-
tem. The GATE output is disabled (held low) unless the
voltage on this pin exceeds 1V, allowing the PWM to
force zero duty cycle when necessary. The PWM forces
maximum duty cycle when the voltage on CAO exceeds
the oscillator peak voltage (3V). A 3.2V clamp circuit pre-
vents the CAO voltage from rising excessively past the
oscillator peak voltage for excellent transient response.
COMMAND (Digital-to-Analog Converter Output Volt-
age): This pin is the output of the 4-bit digital-to-analog
converter (DAC) and the noninverting input of the voltage
amplifier. The voltage on this pin sets the switching regu-
lator output voltage. Setting all input control codes low
produces 3.5V at COMMAND; setting all codes high pro-
duces 2.0V at COMMAND. The DAC LSB step size (i.e.
resolution) is 100mV (See Table 1). The COMMAND
source impedance is typically 1.2k
drive only high impedance inputs if accuracy is to be
maintained. Bypass COMMAND with a 0.01 F, low ESR,
low ESL capacitor for best circuit noise immunity.
Oscillator
Output Section
Foldback Current Limit
Frequency (-4)
Frequency (-5)
Frequency (-6)
Frequency Change With Voltage
Maximum Duty Cycle
Output Low Voltage
Output High Voltage
Rise Time
Fall Time
Output Impedance
Clamp Level
PARAMETER
A
< 70°C, T
10.8V < VIN < 15V
I
I
C
C
I
I
Measured at Voltage EA Output;
V
V
GATE
GATE
GATE
GATE
SENSE
COMMAND
GATE
GATE
and must therefore
A
= T
= –100mA
= 100mA
= 100mA
= –100mA
= 3.3nF
= 3.3nF
= V
J
.
Unless otherwise specified, VIN = 12V, VSENSE = 3.5V, V
COMMAND
= 3V, V
TEST CONDITIONS
SENSE
= 3V
4
= 0
Decimal
COMP (Voltage Amplifier Output): The system voltage
compensation network is applied between COMP and
VFB.
D0 - D3 (DAC Digital Input Control Codes): These are
the DAC digital input control codes, with D0 representing
the least significant bit (LSB) and D3, the most significant
bit (MSB). A bit is set low by being connected to GND. A
Code
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Table 1. Programming the COMMAND Voltage
D3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
D2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
MIN
D1
85
90
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
UCC2880-4/-5/-6
UCC3880-4/-5/-6
TYP
0.20
11.8
100
200
400
ENBL
4.4
3.7
95
20
15
1
2
2
D0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
= 5V, VD0 =
MAX UNITS
115
99
80
80
COMMAND
Voltage
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
kHz
kHz
kHz
ns
ns
%
%
V
V
V
V