MC14018B
Presettable Divide−By−N
Counter
asynchronously presettable and resettable. The counters are
synchronous, and increment on the positive going edge of the clock.
Data on the Jam inputs will then be transferred to their respective Q
outputs (inverted). A logic 1 on the reset input will cause all Q outputs
to go to a logic 1 state.
connecting appropriate Q outputs to the data input, as shown in the
Function Selection table. Anti−lock gating is included in the
MC14018B to assure proper counting sequence.
Features
•
•
•
•
•
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
either V
*For additional information on our Pb−Free strategy and soldering details, please
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2005
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Symbol
V
I
The MC14018B contains five Johnson counter stages which are
Presetting is accomplished by a logic 1 on the preset enable input.
Division by any number from 2 to 10 can be accomplished by
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
Schottky TTL Load Over the Rated Temperature Range
Fully Static Operation
Schmitt Trigger on Clock Input
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Pin−for−Pin Replacement for CD4018B
Pb−Free Packages are Available*
in
in
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
V
T
P
, V
, I
T
T
DD
stg
D
A
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8−Second Soldering)
v (V
). Unused outputs must be left open.
in
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
−0.5 to V
−0.5 to +18.0
SS
−55 to +125
−65 to +150
out
)
Value
± 10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
CASE 751B
CASE 648
P SUFFIX
D SUFFIX
PDIP−16
SOIC−16
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Publication Order Number:
16
1
16
1
DIAGRAMS
MARKING
MC14018BCP
AWLYYWWG
AWLYWW
MC14018B/D
14018BG