MCP2122-E/SNG Microchip Technology, MCP2122-E/SNG Datasheet - Page 11

• Manufacturer Part Number: MCP2122-E/SNG
• Description: Infrared Encoder/Decoder
• Manufacturer: Microchip Technology

2.6
The UART interface is used to communicate with the
host controller. Though a UART is capable of a full-
duplex interface, the direct coupling to the IR encoder/
decoder allows only half-duplex operation (since the IR
side is either receiving or transmitting and not both at
the same time). This means that the system can not
transmit and receive at the same time.
2.6.1
When the controller sends serial data to the MCP2122,
the baud rates are required to match.
There will be some jitter on the detection of the high to
low edge of the start bit. This jitter will affect the place-
ment of the encoded start bit. All subsequent bits will be
16 BITCLK times later.
While RXIR is receiving data (low pulse), the TXIR pin
is disabled from transmitting.
2.6.2
When the controller receives serial data from the
MCP2122, the baud rates are required to match.
There will be some jitter on the detection of the high-to-
low edge of the Start bit. This jitter will affect the
placement of the decoded Start bit. All subsequent bits
will be 16 BITCLK times later.
The TXIR pin is disabled when data is being received
(low pulse) on the RXIR pin.
FIGURE 2-11:
 2004 Microchip Technology Inc.
BITCLK
RXIR
Host UART Interface
TXIR
RX
TX
TRANSMITTING
RECEIVING
EFFECTS OF JITTER AND OFFSET
TX Jitter
RX Jitter
3 16XCLK
16 16XCLK
TX Offset
RX Offset
Preliminary
3 16XCLK
16 16XCLK
16 16XCLK
2.7
The IR interface is used to communicate with the
optical receiver circuitry. The IR interface is either
transmitting data or receiving data (half-duplex).
2.8
Figure 2-11 shows the jitter on the RXIR and TX pins,
and the offset on the RX pin and the TXIR pin.
Jitter is the possible variation of the desired edge.
Figure 2-9 and Figure 2-10 show the jitter of the TX pin
(range is indicated by red dashed lines).
Offset is the propagation delay of the input signal (RXIR
or TX) to the output signal (RX or TXIR). Figure 2-9 and
Figure 2-10 show the offset of the TXIR pin from the
16XCLK signal that starts the bit time.
2.9
The device can be placed in a Low Power mode by
forcing the RESET pin low. This disables the internal
state machine. To ensure that the lowest power con-
sumption is obtained, ensure that the 16XCLK pin is
not active and that the other input pins (TX and RXIR)
are at a logic-high or logic-low level.
2.9.1
When returning to normal operation, the RESET pin
must be forced high and the 16XCLK signal should be
operating. Time should be given to ensure that the
16XCLK is stabilized at the desired frequency before
data is allowed to be transmitted or received.
IR Interface
Encoding/Decoding Jitter and
Offset
Minimizing Power
RETURNING TO OPERATION
16 16XCLK
MCP2122
DS21894A-page 11