MCP25025-E/SL Microchip Technology, MCP25025-E/SL Datasheet - Page 49

• Manufacturer Part Number: MCP25025-E/SL
• Description: CAN I/O Expander Family, -40C to +125C, 14-SOIC 150mil, TUBE
• Manufacturer: Microchip Technology

FIGURE 8-3:
8.4.2
The Power-up Timer (PWRT) provides a fixed, 72 ms
nominal time-out, on power-up only, from the POR. The
Power-up Timer operates on an internal RC oscillator,
with the device being kept in reset as long as the PWRT
is active. The PWRT's time delay allows V
an acceptable level. The power-up time delay will vary
from device to device due to V
process variation. For more information, please see
Section 9.2 “DC Characteristics”.
8.5
The Oscillator Start-up Timer (OST) provides a 512
oscillator cycle (T
complete. This ensures that the crystal oscillator has
started and stabilized and must be less than the total
time it takes (704 oscillator cycles or 44 T
minimum standard data frame or remote transmit
message to be completed on the CAN bus once a
wake-up from SLEEP occurs. The OST time-out is
invoked only on Power-on Reset or wake-up from
SLEEP.
8.6
Power-down mode (or SLEEP) is enabled via the
SLPEN bit in the OPTREG2 register. When enabled,
the MCP2502X/5X will enter SLEEP once the CAN bus
has been idle for a minimum 1408 bit times while in
Normal mode.
Additionally, the device may be configured to enter
SLEEP while in Listen-only mode immediately after
power-up if there is no activity on the CAN bus.
Subsequent CAN bus activity will wake the device up
from SLEEP and the NEXT message will be confirmed
© 2007 Microchip Technology Inc.
OSC1
RST
V
Oscillator Start-up Timer
Power-down Mode (SLEEP)
DD
POWER-UP TIMER
OSC
V
RC OSC
On-chip
Detect
DD
) delay after the PWRT delay is
Rise
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
Power-on Reset
PWRT
10-bit Ripple Counter
10-bit Ripple Counter
DD
, temperature and
DD
Q
to rise to
) for the
Enable PWRT
Enable OST
as a valid message before entering Normal mode. This
feature is enabled via the PUSLP bit in the OPTREG2
register.
While in SLEEP, the I/O ports maintain the status they
had before the SLEEP instruction was executed
(driving high, low or hi-impedance).
The following operations will not function while the
device is in SLEEP:
• A/D Module data conversion
• Auto-conversion mode
• Auto-messaging
• PWM module and outputs
• Clock output
8.6.1
The MCP2502X/5X can wake-up from SLEEP through
one of the following events:
• External reset input on RST pin
• Transmit-on-change due to edge detected on
• Activity detected on CAN bus
For the device to wake-up due to a GPIO transmit-on-
change, the corresponding interrupt enable bit must be
set (enabled). Wake-up occurs regardless of the state
of the GIE bit.
If a wake-up from SLEEP is caused by activity on the
CAN bus, the message that caused the wake-up will not
be received or acknowledged by the MCP2502X/5X.
GPIO pin
WAKE-UP FROM SLEEP
MCP2502X/5X
S
Q Chip Reset
DS21664D-page 49