MCP3422A1-E/MS Microchip Technology, MCP3422A1-E/MS Datasheet - Page 18

• Manufacturer Part Number: MCP3422A1-E/MS
• Description: 18-Bit, Multi-Channel Delta-Sigma ADC w/ I2C Interface and On-Board Reference ; 8L MSOP 3x3mm
• Manufacturer: Microchip Technology

MCP3422/3/4
5.2
The device has an 8-bit wide configuration register to
select for: input channel, conversion mode, conversion
rate, and PGA gain. This register allows the user to
change the operating condition of the device and check
the status of the device operation.
REGISTER 5-1:
DS22088B-page 18
bit 7
* Default Configuration after Power-On Reset
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3-2
bit 1-0
R/W-1
RDY
1 *
Configuration Register
RDY: Ready Bit
This bit is the data ready flag. In read mode, this bit indicates if the output register has been updated
with a latest conversion result. In One-Shot Conversion mode, writing this bit to “1” initiates a new
conversion.
Reading RDY bit with the read command:
1 = Output register has not been updated.
0 = Output register has been updated with the latest conversion result.
Writing RDY bit with the write command:
Continuous Conversion mode: No effect
One-Shot Conversion mode:
1 = Initiate a new conversion.
0 = No effect.
C1-C0: Channel Selection Bits
00 =
01 =
10 =
11 =
O/C: Conversion Mode Bit
1 = Continuous Conversion Mode (Default). The device performs data conversions continuously.
0 = One-Shot Conversion Mode. The device performs a single conversion and enters a low power
S1-S0: Sample Rate Selection Bit
00 =
01 =
10 =
11 =
G1-G0: PGA Gain Selection Bits
00 =
01 =
10 =
11 =
R/W-0
standby mode until it receives another write or read command.
C1
0 *
CONFIGURATION REGISTER
Select Channel 1 (Default)
Select Channel 2
Select Channel 3 (MCP3424 only, treated as “00” by the MCP3422/MCP3423)
Select Channel 4 (MCP3424 only, treated as “01” by the MCP3422/MCP3423)
240 SPS (12 bits) (Default)
60 SPS (14 bits)
15 SPS (16 bits)
3.75 SPS (18 bits)
x1 (Default)
x2
x4
x8
W = Writable bit
‘1’ = Bit is set
R/W-0
C0
0 *
R/W-1
O/C
1 *
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
The user can rewrite the configuration byte any time
during the device operation.
configuration register bits.
0 *
S1
R/W-0
S0
0 *
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-0
Register 5-1
G1
0 *
shows the
R/W-0
G0
0 *
bit 0