MCP6002T-I/P Microchip Technology, MCP6002T-I/P Datasheet - Page 7

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MCP6002T-I/P

Manufacturer Part Number
MCP6002T-I/P
Description
Operational Amplifier, Dual channel, V, DIP, 8-Pin
Manufacturer
Microchip Technology
Datasheet
3.0
The MCP6002 is manufactured using Microchip’s
state-of-the-art CMOS process and is specifically
designed for low cost, low power and general purpose
applications. The low supply voltage, low quiescent
current and wide bandwidth makes the MCP6002 ideal
for battery powered applications. This device has high
phase margin which makes it stable for larger capaci-
tive load applications.
3.1
The input stage of the MCP6002 uses two differential
input stages in parallel; one operates at low common
mode input voltage (V
With this topology, the MCP6002 operates with V
to 300 mV above V
Input
V
proper operation.
3.2
The output voltage range of the MCP6002 is
V
R
Refer to Figure 2-14 for more information.
3.3
The MCP6002 op amp is designed to prevent phase
reversal when the input pins exceed the supply volt-
ages. Figure 3-1 shows an input voltage exceeding
both supplies without any phase reversal.
FIGURE 3-1:
Phase Reversal.
The maximum operating V
inputs is V
(max.). Input voltages that exceed this absolute maxi-
mum rating can cause excessive current to flow into or
out of the input pins. Current beyond ±2 mA can cause
reliability problems. Applications that exceed this rating
must be externally limited with a resistor as shown in
Figure 3-2.
CM
DD
L
2002 Microchip Technology Inc.
= 10 k
- 25 mV (min.) and V
= V
-1
6
5
4
3
2
1
0
SS
0.E+00
APPLICATION INFORMATION
Rail-to-Rail Input
Phase Reversal and Input Voltage
Rail-to-Rail Output
Offset
- 300 mV and V
SS
is connected to V
1.E-04
- 300 mV (min.) and V
2.E-04
V
OUT
Voltage
DD
3.E-04
V
CM
The MCP6002 Shows No
IN
Time (100 µs/div)
and 300 mV below V
4.E-04
) and the other at high V
CM
SS
5.E-04
DD
that can be applied to the
DD
+ 25 mV (max.) when
is
+ 300 mV to ensure
6.E-04
/2 and V
7.E-04
measured
DD
8.E-04
V
G = +1 V/V
DD
DD
+ 300 mV
= 5.0 V
9.E-04
SS
= 5.5 V.
CM
. The
1.E-03
CM
up
at
.
FIGURE 3-2:
Resistor (R
3.4
Capacitive loads can cause stability problems with volt-
age feedback op amps. A buffer configuration (G = +1)
is the most sensitive to capacitive loads. Figure 3-3
shows how increasing the load capacitance will
decrease the phase margin and reduce the bandwidth.
A phase margin above 60° is best, but 45° is still
usable.
The MCP6002 has a phase margin of 90° under the
specified conditions in the AC characteristics table. The
MCP6002 maintains greater than 60° phase margin
(typ.), with 200 pF capacitive load. It also maintains
stability at 45° phase margin (typ.), with 500 pF capac-
itive load, as shown in Figure 3-3.
FIGURE 3-3:
Phase Margin vs. Load Capacitance with Unity
Gain.
If the MCP6002 is required to drive large capacitive
loads (C
Figure 3-4) at the output of the amplifier improves the
phase margin. This resistor makes the output load
resistive at higher frequencies. The bandwidth reduc-
tion caused by the capacitive load, however, is not
changed. To select R
starting with 1 k
quency response shows low peaking.
V
IN
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
L
Capacitive Load and Stability
R
10p
R
IN
1.E-11
> 500 pF), then a series resistor (R
IN
G = +1 V/V
V
R
IN
DD
L
= 100 k
).
= 5.0 V
Unity Loop Gain Frequency
------------------------------------------------------------------------------ -
R
V
--------------------------------------------------------------------------- -
Maximum expected V
IN
SS
and adjust this resistor until the fre-
Load Capacitance (F)
ISO
Minimum expected V
Input Current Limiting
Gain Bandwidth Product,
, use the SPICE macro model
+
MCP6002
100p
2 mA
2 mA
1.E-10
MCP6002
Phase Margin
IN
DS21733A-page 7
V
IN
DD
1n
1.E-09
V
100
90
80
70
60
50
40
30
20
10
0
OUT
ISO
in

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