TDA8559 Philips Semiconductors, TDA8559 Datasheet - Page 8

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TDA8559

Manufacturer Part Number
TDA8559
Description
Low-voltage stereo headphone amplifier
Manufacturer
Philips Semiconductors
Datasheet

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APPLICATION INFORMATION
General
For applications with a maximum supply voltage of 6 V
(input mode LOW) the input pins need a DC path to ground
(see Figs 3 and 4). For applications with supply voltages in
the range from 6 to 18 V (input mode HIGH) the input DC
level is 0.5V
configurations illustrated in Figs 5 and 6 have to be used.
The capacitor Cb is recommended for stability
improvement. The value may vary between
10 and 100 nF. This capacitor should be placed close to
the IC between pin 12 and pin 13.
Heatsink design
The standard application is stereo headphone
single-ended with a 32
(see Fig.9). The headphone amplifier can deliver a peak
output current of 150 mA into the load.
For the DIP16 envelope R
sine wave power dissipation for T
For T
For the SO16 envelope R
sinewave power dissipation for T
For T
1997 Jun 27
1.7 W
1.2 W
0.85 W
2.4 W
Low-voltage stereo headphone amplifier
amb
amb
=
=
=
=
= 60 C the maximum total power dissipation is:
= 60 C the maximum total power dissipation is:
150 25
--------------------- -
150 60
--------------------- -
150 25
--------------------- -
150 60
--------------------- -
P
105
52
52
105
+ 0.6 V. In this situation the input
th j-amb
load impedance to buffer
th j-amb
= 105 K/W; the maximum
= 52 K/W; the maximum
amb
amb
= 25 C is:
= 25 C is:
8
Test conditions
T
f = 1 kHz, R
band-pass filter: 22 Hz to 30 kHz. The total harmonic
distortion as a function of frequency was measured with
low-pass filter of 80 kHz. The quiescent current has been
measured without any load impedance.
In applications with coupling capacitors towards the load,
an electrolytic capacitor has to be connected to pin 4
(SVRR).
Input configurations
The IC can be applied in two ways, ‘input mode low’ and
‘input mode high’. This can be selected by the input mode
at pin 8:
1. Input mode low: pin 8 floating:
2. Input mode high: pin 8 is connected to V
amb
The graphs for the single-ended application have been
measured with the application illustrated in Fig.9; input
configuration for input mode low (Fig.4) and input
configuration for input mode high (Fig.6).
The graphs for the BTL application ‘input mode low’
have been measured with the application circuit
illustrated in Fig.11 and the input configuration
illustrated in Fig.4.
The graphs for the line-driver application have been
measured with the application circuit illustrated in Fig.13
and the input configuration illustrated in Fig.6; input
mode high.
The DC level of the input pins has to be between 0 V
and (V
The maximum output voltage is approximately
2.1 V (RMS). Input configurations illustrated in
Figs 3 and 4 should be used.
This mode is intended for supply voltages >6 V. It can
deliver a maximum output voltage of approximately
6 V (RMS) at THD = 0.5%. The DC voltage level of the
input pins is (0.5V
necessary. Input configurations illustrated in
Figs 5 and 6 should be used.
= 25 C; unless otherwise specified: V
P
L
= 32 , Gain = 26 dB, low input mode,
1.8 V). A DC path to ground is needed.
P
+ 0.6 V). Coupling capacitors are
Product specification
TDA8559
P
P
= 3 V,
:

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