MCP6024-I/SN Microchip Technology, MCP6024-I/SN Datasheet - Page 13
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MCP6024-I/SN
Manufacturer Part Number
MCP6024-I/SN
Description
Rail-to-Rail Input/Output, 10 MHz Op Amps
Manufacturer
Microchip Technology
Datasheet
1.MCP6024-ISN.pdf
(28 pages)
To use the internal mid-supply reference for an
inverting gain circuit, connect the V
inverting input, as shown in Figure 3-4. The capacitor
C
FIGURE 3-4:
V
If you don’t need the mid-supply reference, leave the
V
3.5
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed loop bandwidth is
reduced. This produces gain-peaking in the frequency
response, with overshoot and ringing in the step
response.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
load resistive at higher frequencies. The bandwidth will
be generally lower than the bandwidth with no
capacitive load.
FIGURE 3-5:
stabilizes large capacitive loads.
Figure 3-6 gives recommended R
different capacitive laods and gains. The x-axis is the
normalized load capacitance (C
circuit’s noise gain. For non-inverting gains, G
gain are equal. For inverting gains, G
-1 V/V gives G
REF
B
REF
2003 Microchip Technology Inc.
V
helps reduce power supply noise on the output.
IN
pin open.
(MCP6021 and MCP6023 only).
V
IN
Capacitive Loads
MCP602X
N
R
= +2 V/V).
G
Inverting gain circuit using
Output resistor R
ISO
in Figure 3-5) improves the
R
F
V
L
C
/G
R
REF
B
ISO
N
REF
), where G
N
ISO
is 1+|Gain| (e.g.,
pin to the non-
ISO
V
values for
C
OUT
L
N
V
and the
N
OUT
is the
FIGURE 3-6:
for capacitive loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Evaluation on the bench and
simulations with the MCP6021/2/3/4 Spice macro
model are very helpful. Modify R
response is reasonable.
3.6
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other parts.
3.7
In applications where low input bias current is critical,
PCB (printed circuit board) surface-leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow, which is greater than the
MCP6021/2/3/4 family’s bias current at 25°C (1 pA,
typ).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in Figure 3-7.
FIGURE 3-7:
1,000
100
Guard Ring
10
Supply Bypass
PCB Surface Leakage
10
G
DD
N
Normalized Capacitance; C
MCP6021/2/3/4
for single supply) should have a local
ISO
+1
for your circuit, double-check the
Recommended R
Example guard ring layout.
100
V
IN
– V
12
IN
. A 5V difference would
+
1,000
ISO
DS21685B-page 13
’s value until the
L
/G
N
(pF)
ISO
10,000
values