TDA8752H Philips Semiconductors, TDA8752H Datasheet - Page 17

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TDA8752H

Manufacturer Part Number
TDA8752H
Description
Triple high speed Analog-to-Digital Converter ADC
Manufacturer
Philips Semiconductors
Datasheet

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I
Register definitions
The configuration of the different registers is as follows:
Table 1 I
All the registers are defined by a sub-address of 8 bits; bit A4 refers to the mode which is used with the I
subaddresses of each register.
The bit mode, used only with the I
2
FUNCTION
SUBADDR
OFFSETR
COARSER
FINER
OFFSETG
COARSEG
FINEG
OFFSETB
COARSEB
FINEB
CONTROL
VCO
DIVIDER
(LSB)
PHASEA
PHASEB
C-BUS AND 3-WIRE INTERFACES
If Mode = 0, each register is programmed independently by giving its sub-address and its content
If Mode = 1, all the registers are programmed one after the other by giving this initial condition (xxx1 1111) as the sub-address state; thus, the
registers are charged following the predefined sequence of 16 bytes (from sub-address 0000 to 1101).
NAME
2
C-bus and 3-wire registers
A7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A5
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SUB-ADDRESS
2
C-bus, enables two modes to be programmed:
A4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V level
MSB
Og7
Ob7
Or7
Di8
Z2
X
X
X
X
X
X
X
X
X
H level
Og6
Ob6
Cg6
Cb6
Or6
Cr6
Di7
Di0
Z1
X
X
X
X
X
edge
Og5
Cg5
Ob5
Cb5
Cka
Ckb
Or5
Cr5
Di6
Z0
X
X
X
X
BIT DEFINITION
Mode
Vco1
Og4
Cg4
Ob4
Cb4
Pa4
Pb4
Or4
Cr4
Fg4
Fb4
Fr4
Di5
Up
2
C-bus interface; bits Sa3 to Sa0 are the
Vco0
Og3
Cg3
Ob3
Cb3
Pa3
Pb3
Sa3
Or3
Cr3
Fg3
Fb3
Fr3
Di4
Do
Di11
Og2
Cg2
Ob2
Cb2
Sa2
Or2
Fg2
Fb2
Pa2
Pb2
Cr2
Fr2
Di3
Ip2
Di10
Og1
Cg1
Ob1
Cb1
Sa1
Or1
Fg1
Fb1
Pa1
Pb1
Cr1
Fr1
Di2
Ip1
LSB
Og0
Ob0
Sa0
Cg0
Fg0
Cb0
Fb0
Pa0
Pb0
Or0
Cr0
Di9
Di1
Fr0
Ip0
x010 0000
x010 0000
x010 0000
0000 0100
1001 0000
x000 0000
DEFAULT
xxx1 0000
xxx0 0000
xxx0 0000
xxx0 0000
0110 0001
xx00 0000
0111 1111
0111 1111
0111 1111
VALUE

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