MCP6295T Microchip Technology, MCP6295T Datasheet - Page 11

• Manufacturer Part Number: MCP6295T
• Manufacturer: Microchip Technology

4.0
The MCP6291/2/3/4/5 family of op amps is manufac-
tured
process, specifically designed for low-cost, low-power
and general purpose applications. The low supply
voltage, low quiescent current and wide bandwidth
makes the MCP6291/2/3/4/5 ideal for battery-powered
applications.
4.1
The MCP6291/2/3/4/5 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 4-1 shows the input voltage exceeding
the supply voltage without any phase reversal.
FIGURE 4-1:
No Phase Reversal.
The input stage of the MCP6291/2/3/4/5 op amps use
two differential CMOS input stages in parallel. One
operates at low common mode input voltage (V
while the other operates at high V
ogy, the device operates with V
V
(V
V
Input voltages that exceed the absolute maximum volt-
age (V
current to flow into or out of the input pins. Current
beyond ±2 mA can cause reliability problems. Applica-
tions that exceed this rating must be externally limited
with a resistor, as shown in Figure 4-2.
 2004 Microchip Technology Inc.
DD
DD
OS
) is measured at V
+ 0.3 mV to ensure proper operation.
and 0.3 mV below V
-1
SS
6
5
4
3
2
1
0
using
-15
APPLICATION INFORMATION
Rail-to-Rail Inputs
– 0.3V to V
-14
Microchip’s
-13
-12
V
DD
IN
The MCP6291/2/3/4/5 Show
Time (1 ms/div)
+ 0.3V) can cause excessive
-11
SS
. The Input Offset Voltage
-10
CM
state-of-the-art
CM
V
= V
OUT
-9
CM
up to 0.3 mV above
SS
-8
. With this topol-
– 0.3 mV and
-7
V
G = +2V/V
DD
= 5.0V
-6
CMOS
-5
CM
),
FIGURE 4-2:
Resistor (R
4.2
The output voltage range of the MCP6291/2/3/4/5 op
amp is V
when
V
4.3
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The band-
width will be generally lower than the bandwidth with no
capacitive load.
FIGURE 4-3:
stabilizes large capacitive loads.
Figure 4-4 gives recommended R
ent capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit's noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
DD
V
IN
V
= 5.5V. Refer to Figure 2-16 for more information.
IN
R
R
R
Rail-to-Rail Output
Capacitive Loads
L
IN
DD
IN
= 10 k
MCP6291/2/3/4/5
MCP629X
–
+
IN
– 15 mV (min.) and V
------------------------------------------------------------------------------------ -
V
---------------------------------------------------------------------------------- -
).
Maximum expected V
R
SS
IN
–
is connected
Minimum expected V
Input Current Limiting
Output Resistor, R
ISO
–
+
MCP629X
2 mA
2 mA
in Figure 4-3) improves the
R
L
ISO
/G
ISO
C
N
SS
), where G
N
DS21812D-page 11
L
IN
values for differ-
to
+ 15 mV (max.)
= +2 V/V).
–
V
V
IN
ISO
DD
DD
N
V
/2 and
V
OUT
N
and the
OUT
is the
N
is