TDA9874A Philips Semiconductors, TDA9874A Datasheet - Page 11

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TDA9874A

Manufacturer Part Number
TDA9874A
Description
Digital TV sound demodulator/decoder
Manufacturer
Philips Semiconductors
Datasheet

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6.1.10
The digital controlled crystal oscillator (DCXO) is fully
integrated. Only an external 24.576 MHz crystal is
required.
6.1.11
All test pins are active HIGH. In normal operation of the
device they can be left open-circuit, as they have internal
pull-down resistors. Test functions are for manufacturing
tests only and are not available to customers.
6.1.12
The power fail detector monitors the internal power supply
for the digital part of the device. If the supply has
temporarily been lower than the specified lower limit, the
power failure register bit PFR in subaddress 0 (see
Section 10.4.1), will be set to HIGH. The CLRPFR bit,
slave register subaddress 1 (see Section 10.3.3), resets
the Power-on reset flip-flop to LOW. If this is detected, an
initialization of the TDA9874A has to be performed to
ensure reliable operation.
6.1.13
The reset is active LOW. In order to perform a reset at
power-up, a simple RC circuit may be used which consists
of an integrated passive pull-up resistor and an external
capacitor connected to ground. The pull-up resistor has a
nominal value of 50 k , which can easily be measured
between pins CRESET and V
voltage has reached a certain minimum level, the state of
the circuit is completely undefined and remains in this
undefined state until a reset is applied.
The reset is guaranteed to be active when:
The required capacitor value depends on the gradient of
the rising power supply voltage. The time constant of the
RC circuit should be clearly larger than the rise time of the
power supply [to make sure that the reset condition is
always satisfied (see Fig.4)], even when considering
tolerance spreading. To avoid problems with a too slow
discharging of the capacitor at power-down, it may be
helpful to add a diode from the CRESET pin to V
1999 Dec 03
The power supply is within the specified limits
(4.5 to 5.5 V)
The crystal oscillator (DCXO) is functioning
The voltage at pin CRESET is below 0.3V
V
Digital TV sound demodulator/decoder
DDD
= 5.0 V, typically below 1.8 V).
C
T
P
P
EST PINS
OWER FAIL DETECTOR
OWER
RYSTAL OSCILLATOR
-
ON RESET
DDD3
. Before the supply
DDD
(1.5 V if
DDD
.
11
It should be noted that the internal ESD protection diode
does not help here as it only conducts at higher voltages.
Under difficult power supply conditions (e.g. very slow or
non-monotonic ramp-up), it is recommended to drive the
reset line from a microcontroller port or the like.
6.2
6.2.1
All input channels to the digital crossbar switch are
equipped with a level adjustment facility to change the
signal level in a range of 15 dB. Adjusting the signal level
is intended to compensate for the different modulation
parameters of the various TV standards. Under nominal
conditions it is recommended to scale all input channels to
be 15 dB below full-scale [ 15 dB (FS)]. This will create
sufficient headroom to cope with overmodulation and
avoids changes of the volume impression when switching
from FM to NICAM or vice versa.
6.2.2
The NICAM path has a switchable J17 de-emphasis.
6.2.3
If NICAM is received, the auto-mute is enabled and the
signal quality becomes poor. The digital crossbar switches
automatically to FM, channel 1 or the analog mono input,
as selected by bit AMSEL. This automatic switching
depends on the NICAM bit error rate. The auto-mute
function can be disabled via the I
handbook, halfpage
Description of the DSP
L
NICAM
NICAM
1.5
EVEL SCALING
V
5
Fig.4 Reset at power-on.
PATH
AUTO
V DDD
-
MUTE
4.5 V
reset active
guaranteed
2
Preliminary specification
V CRESET
C-bus.
TDA9874A
0.3V DDD
MHB587
t

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