MCP6G04 Microchip Technology, MCP6G04 Datasheet - Page 19

• Manufacturer Part Number: MCP6G04
• Description: 110 Selectable Gain Amplifier
• Manufacturer: Microchip Technology

4.0
The MCP6G01/2/3/4 family of Selectable Gain
Amplifiers (SGA) is based on simple analog building
blocks (see
explained in more detail in the following subsections.
FIGURE 4-1:
4.1
The internal op amp gives the right combination of
bandwidth, accuracy, and flexibility.
4.1.1
The internal op amp has three compensation
capacitors (comp. caps.) connected to a switching
network. They are selected to give good small signal
bandwidth at high gains, and good slew rate (full power
bandwidth) at low gains. The change in bandwidth as
gain changes is between 250 and 900 kHz. Refer to
Table 4-1
© 2006 Microchip Technology Inc.
GSEL
V
CS
Note:
IN
(V/V)
Gain
APPLICATIONS INFORMATION
Internal Op Amp
10
50
for more information.
1
Gain Select
COMPENSATION CAPACITORS
(MCP6G03
Figure
Switches
V
Logic
Gain
only)
5 MΩ
SS
is assumed to be 0V
4-1). Each of these blocks will be
V
0
V
DD
DD
SGA Block Diagram.
/2 (or open)
GSEL Voltage (Typ.)
V
V
SS
DD
3
(V)
R
R
G
F
V
OUT
TABLE 4-1:
4.1.2
The input stage of the internal op amp uses two
differential input stages in parallel; one operates at low
V
With this topology, the internal inputs can operate to
0.3V past either supply rail, although the output will clip
the signal before that happens.
The transition between the two input stage occurs
when V
22). For the best distortion and gain linearity, avoid this
region of operation.
4.1.3
The MCP6G01/2/3/4 amplifier family is designed with
CMOS input devices. It is designed to not exhibit phase
inversion when the input pins exceed the supply
voltages.
both supplies with no resulting phase inversion.
4.1.4
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors, and to minimize input bias
current (I
when they try to go more than one diode drop below
V
above V
allow normal operation, and low enough to bypass ESD
events within the specified limits.
Note 1:
(V/V)
Gain
IN
SS
10
50
1
(input voltage), while the other operates at high V
. They also clamp any voltages that go too far
2:
3:
4:
IN
DD
Internal
Medium
Comp.
B
Figure 2-7
Large
Small
≈ V
Cap.
). The input ESD diodes clamp the inputs
Figure
; their breakdown voltage is high enough to
Changing the compensation capacitor does not
change the DC performance (e.g., V
G x BW is approximately the Gain Bandwidth
Product of the internal op amp.
FPBW is the Full Power Bandwidth at
V
BW is the closed-loop, small signal –3 dB
bandwidth.
RAIL-TO-RAIL INPUTS
PHASE REVERSAL
INPUT VOLTAGE AND CURRENT
LIMITS
DD
DD
MCP6G01/2/3/4
= 5.5V, which is based on slew rate (SR).
– 1.1V (see
4-2. This structure was chosen to
GAIN VS. INTERNAL
COMPENSATION
CAPACITOR
G x BW
(MHz)
shows an input voltage exceeding
Typ.
0.90
12.5
3.5
Figure 2-19
(V/µs)
Typ.
0.50
SR
2.3
4.5
DS22004A-page 19
FPBW
(kHz)
Typ.
133
260
29
and
OS
Figure 2-
).
(kHz)
Typ.
BW
900
350
250
IN
.