NCP1603 ON Semiconductor, NCP1603 Datasheet

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NCP1603

Manufacturer Part Number
NCP1603
Description
PFC/PWM Combo Controller
Manufacturer
ON Semiconductor
Datasheet
www.DataSheet4U.com
NCP1603
PFC/PWM Combo Controller
with Integrated High
Voltage Startup and Standby
Capability
Modulation (PWM) combo controller. It offers extremely low
no−load standby power consumption that is suitable for the
low−power consumer markets. The key features of the device are
listed below.
Features
PFC Features
PWM Features
Applications
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 8
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
The NCP1603 is a Power Factor Correction (PFC) and Pulse Width
(DCM and CRM)
(8% of Nominal Output Level)
Capability During Standby Condition
Extremely Low No−Load Standby Power Consumption
Coupled Auxiliary Transformer Winding
Pb−Free Package is Available
Near−Unity Power Factor in Discontinuous and Critical Mode
Voltage−Mode Operation
Low Startup and Shutdown Current Consumption
Programmable Switching Frequency for DCM
Synchronization Capability
Overvoltage Protection (107% of Nominal Output Level)
Undervoltage Protection or Shutdown
Programmable Overcurrent Protection
Thermal Shutdown with Hysteresis (95/140°C)
Undervoltage Lockout with Hysteresis (9.0/10.5 V)
Integrated Lossless High Voltage Startup Current Source
100 kHz PWM Current−Mode Operation with Skipping Cycle
PFC Bias Voltage is Disabled in Standby Condition to Achieve
Fault Protection Implemented by a Timer and Independent of Badly
Primary Overcurrent Protection and Latched Overvoltage Protection
Internal 2.5 ms Soft−Start
"
Latched Thermal Shutdown with Hysteresis (140/165°C)
Undervoltage Lockout with Hysteresis (5.6/7.7/12.6 V)
Notebook Adapters
TV/Monitors
6.4% Frequency Jittering for Improved EMI Performance
*
1
NCP1603D100R2
NCP1603D100R2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
Device
GND2
GND1
V
Out1
V
CS2
FB2
Osc
CC1
ORDERING INFORMATION
aux
A
WL = Wafer Lot
Y
WW = Work Week
G
CASE 751B
D SUFFIX
PIN CONNECTIONS
http://onsemi.com
2
3
4
5
6
7
8
1
SO−16
= Assembly Location
= Year
= Pb−Free Package
(Top View)
(Pb−Free)
Package
SO−16
SO−16
Publication Order Number:
16
1
2500 Tape & Reel
2500 Tape & Reel
1603D100G
16
15
14
13 Out2
12
10
11
MARKING
DIAGRAM
9
AWLYWW
Shipping
HV
NC
V
Ramp
CS1
V
FB1
CC2
control
NCP1603/D

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NCP1603 Summary of contents

Page 1

... Integrated High Voltage Startup and Standby Capability The NCP1603 is a Power Factor Correction (PFC) and Pulse Width Modulation (PWM) combo controller. It offers extremely low no−load standby power consumption that is suitable for the low−power consumer markets. The key features of the device are listed below ...

Page 2

... EMI AC Filter Input Not Synchronized and V EMI AC Filter Input Synchronized and Output OVP Latch Implemented NCP1603 NCP1603 OVP Latch Implemented CC OVP NCP1603 Figure 1. Typical Application Circuits http://onsemi.com 2 + Output Voltage − OVP Output Voltage + − ...

Page 3

... S 9V Current Mirror Zero Current Detection < 45mA 5 Osc + − 94mA 3 NCP1603 − + 125 ms delay 0.75V/ 1.25V Thermal Shutdown Fault−1 (140/165°C) Fault−2 start_Vaux initially S R disable Vaux Q 125 ms delay & latchoff, reset Fault− ...

Page 4

... V PWM Supply Voltage CC2 Connected 16 HV High Voltage NCP1603 Description This pin connects to the V pin externally. It delivers a bias voltage from the V CC1 PFC section. The V is disabled when either one of the following conditions occurs: aux ( initially off; aux (2) Fault (V > ...

Page 5

... Pin 1−14: Human Body Model 2000 V per Mil−Std−883, Method 3015. Machine Model Method 200 V. Pin 16 is the HV startup of the device and is rated to the maximum rating of the part, or 500 V. 2. This device contains latchup protection and exceeds 100 mA per JEDEC Standard JESD78. NCP1603 Symbol V max ...

Page 6

... CC2(on) FB2 Startup ( CC2 Leakage ( 700 V) CC2 Minimum Startup Voltage ( CC2 CC2(on) 3. Consult factory for other frequency options. 4. Guaranteed by design. NCP1603 = 25°C, for min/max values Pin − − osc2 − − − ...

Page 7

... Maximum Control Voltage (I FB1 = 100 mA) Feedback Pin Voltage (I FB1 Overvoltage Protection Current Ratio Overvoltage Protection Current Threshold Undervoltage Protection Current Threshold 5. Comparator lower threshold is also the synchronization threshold. NCP1603 (For typical values T = 25°C, for min/max values Pin Symbol 14 V CC2(on) ...

Page 8

... V, Out1 = Open, Osc = 220 pF) CC1 Operating ( Out1 = 1 GND1, Osc = 220 pF) CC1 Shutdown ( CC1 FB 6. Guaranteed by design. NCP1603 (continued) (For typical values T = 25°C, for min/max values 100 nF, Ramp = 330 pF, Osc = 220 pF unless otherwise specified). Pin Symbol ...

Page 9

... T , JUNCTION TEMPERATURE (°C) J Figure 5. PWM Section Maximum Duty vs. Temperature 1.1 1.05 1 0.95 0.9 −50 − JUNCTION TEMPERATURE (°C) J Figure 7. PWM Section Current Limit vs. Temperature NCP1603 100 125 −50 − Figure 4. PWM Section Oscillator Frequency ...

Page 10

... JUNCTION TEMPERATURE (°C) J Figure 11. PWM Section Minimum Output Pulse vs. Temperature 1.4 1.2 1 0.8 0.6 0.4 0.2 0 −50 − JUNCTION TEMPERATURE (°C) J Figure 13. PWM Section Standby Thresholds vs. Temperature NCP1603 120 100 100 125 −50 −25 T Figure 10. CS2 Pin Propagation Delay 3.15 3.1 3. CS2 ...

Page 11

... HV Pin = 700 CC2 −50 − JUNCTION TEMPERATURE (°C) J Figure 19. PWM Section HV Pin Leakage Current vs. Temperature NCP1603 160 140 120 100 0.75 V FB2 100 125 −50 −25 Figure 16. PWM Section Validation Time for Recognizing a Fault vs. Temperature ...

Page 12

... T , JUNCTION TEMPERATURE (°C) J Figure 23. PFC Section Oscillator Frequency vs. Temperature 5.5 5 4.5 4 3.5 3 −50 − JUNCTION TEMPERATURE (°C) J Figure 25. PFC Section Synchronization Thresholds vs. Temperature NCP1603 2.5 V CC2(on CC2(op1) V CC2(off) I 1.5 CC2(op2) V CC2(latch CC2(latch) CC2(reset 100 125 −50 −25 T Figure 22 ...

Page 13

... JUNCTION TEMPERATURE (°C) J Figure 29. PFC Section Regulation Block vs. Temperature 25° 100 150 I , FEEDBACK CURRENT (mA) FB Figure 31. Feedback Pin Voltage vs. Feedback Current NCP1603 1.2 1 0.8 0.6 0.4 0 100 125 150 160 Figure 28. PFC Section Regulation Block 1.1 1.08 1.06 1.04 1.02 1 −50 −25 75 100 125 T Figure 30 ...

Page 14

... T , JUNCTION TEMPERATURE (°C) J Figure 37. PFC Section Overcurrent Protection Threshold vs. Temperature NCP1603 100 125 −50 − JUNCTION TEMPERATURE (°C) J Figure 34. PFC Section Overvoltage Protection ...

Page 15

... Resistance vs. Temperature −50 − JUNCTION TEMPERATURE (°C) J Figure 43. PFC Section Supply Current in Startup and Shutdown Conditions vs. Temperature NCP1603 105 104 103 102 101 100 −50 −25 75 100 125 T Figure 40. PFC Section Charging Current 11 10 ...

Page 16

... PFC and PWM sections for bulk capacitor ripple current reduction. 7. Safety protection features. NCP1603 is a co−package of two individual IC dies. (NCP1601 and NCP1230, 100 kHz) The PFC die links up pin 5 to pin 12 that are in the lower half of Figure 46. The PWM die links up the other pins that are in the upper half of Figure 46 ...

Page 17

... Pin 8 and Pin 14. The grounds of the two dies are physically connected through the package substrate but they are needed to be connected externally. The bias voltage to the NCP1603 comes from the bulk voltage V through the HV pin (Pin 16) during startup. After bulk startup, a second− ...

Page 18

... V typical). This soft−start feature offers a reduced NCP1603 Regulation in the PWM Section is V (10.5 V CC1(on) The PWM section (or the second stage) of the NCP1603 is NCP1230 that is a current−mode fixed−frequency PWM is over V CC2 CC2(off) flyback controller with internal compensation ramp. The simplified block diagram of the duty cycle regulation ...

Page 19

... Soft−Start 1 V Max Soft−Start Period 2.5 ms Figure 52. Block Diagram and Timing Diagram of Fault Detection NCP1603 Fault Condition Figure 52 illustrates the fault detection circuitry and its timing diagram. When fault (or output short circuit) happens, the output voltage collapses and the optocoupler 106 ...

Page 20

... The power supply dissipates some power due to the switching signal of Out2 and waits for possible auto−recovery of operation when the fault is cleared. As shown in Figure 53, NCP1603 has a “double hiccup” feature that allows the drain current in every two V hiccup cycle in fault condition. The “double hiccup” ...

Page 21

... V, the duty ratio is modulated by the PWM block that is illustrated in Figure 50. NCP1603 PFC in Discontinuous/Critical Mode The PFC section of the NCP1603 is NCP1601 that is designed for low−power PFC boost circuit in DCM or CRM and takes advantages on both operating modes. DCM limits the maximum switching frequency. It simplifies the front− ...

Page 22

... T Figure 59. Inductor Current in DCM As shown in Figure 59, the inductor current I switching cycle starts from zero in DCM. CRM is a special NCP1603 case of DCM when t 3 MOSFET is on, the inductor current for a time duration t pk voltage V . Equation 3 is formulated. in The input filter capacitor C filter absorb the high− ...

Page 23

... C low−pass filter that has a bandwidth f control It is generally recommended to limit the bandwidth below achieve power factor correction. Typical value of is 0.1 mF. C control 1 C control u 2p300kW f control NCP1603 V reg from ton 96% I ref Regulation Block is much 1 > ...

Page 24

... Feedback in PFC Section The output voltage of the PFC circuit (i.e., bulk voltage sensed as a feedback current I bulk FB1 pin (Pin 9) of NCP1603. The FB1 pin voltage V typically smaller than 5.0 V referring to Figure 31 much lower than V that is typically 400 V. Therefore, bulk V is generally neglected. ...

Page 25

... CS1 I L These operating lines are added in Figure 65 to formulate Figure 66. When the inductor current the sense current I is smaller than I L(ZCD) S hence the zero current signal is generated. NCP1603 and S1 Best ZCD point V S(ZCD) Figure 66. CS Pin Characteristic with Different ...

Page 26

... Osc pin is opened. osc(max) Hence, the oscillator switching frequency can be formulated in Equation 25 and represented in Figure 70 405 kHz C osc + * osc NCP1603 700 600 500 400 300 200 100 0 0 Figure 70 ...

Page 27

... PWM section output is capable "1.0 A peak drive current and has a typical rise and fall time and a fall time with a 1.0 nF capacitive load. NCP1603 Safety Features of NCP1603 (1) Bulk Voltage Overvoltage Protection (OVP) When the PFC feedback current I of the reference current I ...

Page 28

... Figure 75. Output Latched OVP Application Circuit R CS2 (7) Dual Thermal Shutdown (TSD) The NCP1603 consists of two individual dies that incorporates their individual thermal shutdown. The PFC thermal circuitry disables the PFC gate drive Out1 and then keeps the power switch off when its junction temperature exceeds 170 ° ...

Page 29

... The variation of the duty ratio in the PWM stage between the PFC−on or PFC−off can be very large. When the NCP1603 circuit is operating at some conditions between PFC on and off boundary, the duty ratio variation can lead to unwanted on/off toggling in the PFC stage. A current ...

Page 30

... T M The products described herein (NCP1603), may be covered by one or more of the following U.S. patents: 6,271,735, 6,362,067, 6,385,060, 6,597,221, 6,970,365. There may be other patents pending. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein ...

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