NCP5424 ON Semiconductor, NCP5424 Datasheet
NCP5424
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NCP5424 Summary of contents
Page 1
... The NCP5424 can also be configured as two independent out−of−phase controllers. Using the NCP5424 in a current sharing input configuration is ideal for applications where more power is required than is available from one supply, such as video cards or other plug− ...
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... Figure 1. Two−Phase Buck Regulator Application, with Input Current Sharing NCP5424 C11 1 BST CC GATE(H)1 GATE(H)2 Q2 GATE(L)1 GATE(L)2 MTD90N02 IS+1 IS+2 NCP5424 C14 0.1 mF IS− V FB+2 COMP1 COMP2 V V FB1 FB−2 R GND OSC R12 30 http://onsemi.com 2 3 C17 ...
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... V Input Power supply pin GATE(L)2 Low Side Synchronous FET driver pin for channel 2. 16 GATE(H)2 High Side Switch FET driver pin for channel 2. NCP5424 Rating Junction−to−Case, R qJC Junction−to−Ambient, R qJA Reflow: (SMD styles only) (Note MAX ...
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... Fall Time GATE(H) to GATE(L) Delay GATE(L) to GATE(H) Delay GATE(H)1(2) and GATE(L)1(2) pull−down. PWM Comparator PWM Comparator Offset Artificial Ramp Minimum Pulse Width 2. Guaranteed by design, not 100% tested in production. NCP5424 (0 C < T < < T < 125 OSC = C = 1.0 nF, V GATE(H)1,2 ...
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... OVC Latch COMP1 Discharge Current Cycle−to−Cycle Current Limit (Controller 2) OVC Comparator Offset Voltage IS+ 2 Bias Current OVC Common Mode Range OVC Latch COMP2 Discharge Current 3. Guaranteed by design, not 100% tested in production. NCP5424 (0 C < T < < T < 125 ...
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... BIAS V CC 8.6 V 7.8 V IS+1 IS− IS+2 FAULT Set Dominant R 0. 1.0 V NCP5424 OSC CURRENT SOURCE GEN CLK1 OSC CLK2 PWM Comparator 1 RAMP1 0.40 V PWM Comparator 2 RAMP2 E/A OFF E/A OFF 0.40 V E/A1 V COMP1 V V FB1 FB−2 FB+2 Figure 2. Block Diagram http://onsemi.com 6 RAMP2 RAMP1 ...
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... THEORY OF OPERATION The NCP5424 is a dual output or single two−phase power 2 supply controller that utilizes the V 2 synchronous V buck regulators can be built using a single controller or a single output converter that draws programmable amounts of current from two input voltages. The fixed−frequency architecture, driven from a common ...
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... Compensation Capacitor above the 0.45 V Soft−Start threshold, such that the controller starts switching without a soft−start delay. The effect of this is to eliminate NCP5424 the buildup of negative currents that arise during a long start interval where the bottom FET of controller 2 is on. For applications where there are two outputs, this problem can not occur ...
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... This ends the PWM pulse for the particular cycle and in so doing, limits the energy delivered to the load on a cycle−by−cycle basis. One advantage of this current limiting scheme is that the NCP5424 will limit transient currents and will resume normal operation the cycle after the transient goes away. ...
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... Duty Cycle + LFET * V HFET * V L where buck regulator output voltage; OUT V = high side FET voltage drop due to R HFET NCP5424 V = output inductor voltage drop due to inductor wire L DC resistance buck regulator input voltage low side FET voltage drop due to R ...
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... I = inductor peak current; L(PEAK load current; OUT DI = inductor ripple current. L NCP5424 where: I L(VALLEY) Selection of the Output Capacitors These components must be selected and placed carefully to yield optimal results. Capacitors should be chosen to I SW(MAX) provide acceptable ripple on the regulator output voltage. Key specifications for output capacitors are their ESR (Equivalent Series Resistance), and ESL (Equivalent Series Inductance) ...
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... where input inductor input capacitor(s). NCP5424 SELECTION OF THE POWER FET FET Basics The use of a MOSFET as a power switch is compelled by two reasons: 1) high input impedance; and 2) fast switching times. The electrical characteristics of a MOSFET are considered to be nearly those of a perfect switch. Control and drive circuitry power is therefore reduced ...
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... FET junction−to−ambient thermal resistance. qJA Control IC Power Dissipation The power dissipation of the IC varies with the MOSFETs used and the NCP5424 operating frequency. The CC average MOSFET gate charge current typically dominates the control IC power dissipation. R qJA ] The IC power dissipation is determined by the formula: ...
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... Fortunately, the input offset of the NCP5424 is low so that this error term is reduced. Current Sharing Compensation Capacitor Selection The NCP5424 is designed for single and dual output applications. Therefore the IC needs two separate compensation capacitors for the dual output designs, which is not desirable for a single output design. With two compensation capacitors, a race condition between the master and slave controllers is created. During start− ...
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... Chosen value, 0.1 mF will make R a reasonable C RC value. And the IS− divider value can be selected with this equation. V out · out * V os NCP5424 where Output regulated voltage. out V = Offset voltage, example above was 20 mV Chosen value good choice. ...
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... In applications where the internal slope compensation is insufficient, the performance of the NCP5424−based regulator can be improved through the addition of a fixed amount of external slope compensation at the output of the PWM Error Amplifier (the COMP pin) during the regulator off− ...
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... LAYOUT GUIDELINES When laying out the CPU buck regulator on a printed circuit board, the following checklist should be used to ensure proper operation of the NCP5424. 1. Rapid changes in voltage across parasitic capacitors and abrupt changes in current in parasitic inductors are major concerns for a good layout. ...
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... G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 K 0.10 0.25 0.004 5.80 6.20 0.229 R 0.25 0.50 0.010 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NCP5424/D MAX 0.393 0.157 0.068 0.019 0.049 0.009 0.009 _ 7 0.244 0.019 ...