MC33364 ON Semiconductor, MC33364 Datasheet - Page 11

• Manufacturer Part Number: MC33364
• Description: Critical Conduction GreenLine SMPS Controller
• Manufacturer: ON Semiconductor

of 100% with 25% tolerance. When the TL431 is full-on,
5 mA will be drawn from the transistor within the
MOC8102. The transistor should be in saturated state at that
time, so its collector resistor must be
reference voltage to the feedback pin of the MC33364, the
external resistor can have a higher value
through the optoisolator diode and the voltage sense divider
on the secondary side.
heavy load resistance is given by:
R
R ext + R3 +
R
f pn +
R
f pn +
collector
noload
heavy
The MOC8102 has a typical current transfer ratio (CTR)
Since a resistor of 5.0 k is internally connected from the
This completes the design of the voltage feedback circuit.
In no load condition there is only a current flowing
The load at that condition is given by:
The output filter pole at no load is:
In heavy load condition the I
The output filter pole at heavy load of this output is
( 2p R
(2p R
+
+
+
V out
I out
(I
heavy
noload
LED
V
(R
1
ref
1
(R
V out
+ 6.0 V
I
int
LED
* V sat
) I
C out )
int
) * (R
2.0 A
C out )
)(R
div
+
+
collector
+
)
(5.0 mA ) 0.25 mA)
+ 3.0 W
collector
+ 5.0 V * 0.3 V
(2p)(1143)(300 mF)
(2p)(3)(300 mF)
LED
5.0 mA
)
6.0 V
+ 1157 W [ 1200 W
and I
)
1
1
+
div
(5.0 k)(940)
5.0 k * 940
is negligible. The
+ 177 Hz
+ 940 W
+ 1143 W
+ 0.46 Hz
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MC33364
11
high input voltage will be:
approximately:
bandwidth is calculated at the rated load because that yields
the bandwidth condition, which is:
The output resistance of the voltage sense divider is given by
the parallel combination of resistors in the divider:
light load filter pole:
A +
f c + fs min
Gc + 20 log
A c + 10 (Gc 20) + 10 (14.14 20) + 51
R
R9 + (Ac) (R
C8 +
C7 +
in
The gain exhibited by the open loop power supply at the
The
The gain needed by the error amplifier to achieve this
The gain in absolute terms is:
Now the compensation circuit elements can be calculated.
The compensation zero must be placed at or below the
+ R upper || R
(V
V
2p (A c ) (R
2p (R9) (f pn )
5
in max
in max
maximum
+ 70 kHz
1
in
)(V error )(Np)
f
1
* V out
) + 29.75 k [ 30 k
f c
ph
5
in
lower
) (f c )
* A + 20 log 14 kHz
+ 11.63 mF [ 10 mF
+ 14 kHz
2
recommended
+ 10 k || 14 k + 5833 W
+ 382 pF [ 390 pF
Ns
+
( 382 V * 6.0 V )
(382 V)(1.2 V)(139)
+ 15.53 + 23.82 dB
177
bandwidth
* 23.82 dB
+ 14.14 dB
2
(7)
is