FM1808 Ramtron Corporation, FM1808 Datasheet - Page 6

• Manufacturer Part Number: FM1808
• Description: Density = 256Kbit ;; Interface = Parallel ;; Speed = 70ns ;; VDD = 5V
• Manufacturer: Ramtron Corporation

FRAM Design Considerations
When designing with FRAM for the first time, users
of SRAM will recognize a few minor differences.
First, bytewide FRAM memories latch each address
on the falling edge of chip enable. This allows the
address bus to change after starting the memory
access. Since every access latches the memory
address on the falling edge of /CE, users cannot
ground it as they might with SRAM.
Users who are modifying existing designs to use
FRAM should examine the memory controller for
timing compatibility of address and control pins.
Each memory access must be qualified with a low
transition of /CE. In many cases, this is the only
change required. An example of the signal
relationships is shown in Figure 2 below. Also
shown is a common SRAM signal relationship that
will not work for the FM1808.
Rev. 2.3
May 2003
Signaling
Signaling
SRAM
FRAM
Address
Address
Data
Data
CE
CE
Figure 2. Chip Enable and Memory Address Relationships
A1
A1
D1
Valid Strobing of /CE
Invalid Strobing of /CE
The reason for /CE to strobe for each address is two -
fold: it latches the new address and creates the
necessary precharge period while /CE is high.
A second design consideration relates to the level of
V
forced to monitor V
backup. They typically block user access below a
certain V
battery with current demand from an active SRAM.
The user can be abruptly cut off from access to the
nonvolatile memory in a power down situation with
no warning or indication.
FRAM memories do not need this system overhead.
The memory will not block access at any V
The user, however, should prevent the processor
from accessing memory when V
tolerance. The common design practice of holding a
processor in reset when V
special provisions must be taken for FRAM design.
DD
D1
during operation. Battery-backed SRAMs are
DD
level in order to prevent loading the
A2
DD
in order to switch to battery
A2
DD
drops is adequate; no
D2
D2
DD
Page 6 of 12
is out-of-
FM1808
DD
level.