74ABT544D Philips Semiconductors, 74ABT544D Datasheet

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74ABT544D

Manufacturer Part Number
74ABT544D
Description
Octal latched transceiver with dual enable/ inverting 3-State
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors Advanced BiCMOS Products
FEATURES
ORDERING INFORMATION
June 1, 1993
24-pin plastic DIP
24-pin plastic SOL
24-pin plastic SSOP Type II
PIN CONFIGURATION
Combines 74ABT245 and 74ABT373 type
functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each
direction
Output capability: +64mA/–32mA
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
Octal latched transceiver with dual enable,
inverting (3-State)
OEBA
LEBA
GND
EAB
A2
A3
A6
A0
A1
A4
A5
A7
10
11
12
1
2
3
4
5
6
7
8
9
PACKAGES
24
23
22
21
20
19
18
17
16
15
14
13
V
EBA
B0
B1
B2
B3
B4
B5
B6
B7
LEAB
OEAB
CC
DESCRIPTION
The 74ABT544 high-performance BiCMOS
device combines low static and dynamic
power dissipation with high speed and high
output drive.
The 74ABT544 Octal Registered Transceiver
contains two sets of D-type latches for
temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB,
LEBA) and Output Enable (OEAB, OEBA)
inputs are provided for each register to
permit independent control of data transfer in
either direction. The outputs are guaranteed
to sink 64mA.
LOGIC SYMBOL
ESD protection exceeds 2000 V per MIL
STD 883 Method 3015 and 200 V per
Machine Model
TEMPERATURE RANGE
23
14
11
1
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
EAB
EBA
LEAB
LEBA
A0 A1 A2 A3
B0 B1 B2
22
3
21
4
20
5
B3
19
6
1
A4 A5 A6 A7
B4 B5 B6
18
7
17
8
OEAB
OEBA
16
9 10
B7
15
ORDER CODE
74ABT544DB
13
2
74ABT544N
74ABT544D
FUNCTIONAL DESCRIPTION
The ’ABT544 contains two sets of eight
D–type latches, with separate control pins for
each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB)
input and the A-to-B Latch Enable (LEAB)
input are Low the A-to-B path is transparent.
A subsequent Low-to-High transition of the
LEAB signal puts the A data into the latches
where it is stored and the B outputs no longer
change with the A inputs. With EAB and
OEAB both Low, the 3-State B output buffers
are active and invert the data present at the
outputs of the A latches.
Control of data flow from B to A is similar, but
using the EBA, LEBA, and OEBA inputs.
LOGIC SYMBOL (IEEE/IEC)
23
13
14
10
11
2
1
3
4
5
6
7
8
9
1EN3
G1
1C5
2EN4
G2
2C6
5D
3
DRAWING NUMBER
(BA)
(AB)
Product specification
74ABT544
4
5D
0410D
0173D
1641A
853–1610 09907
22
21
20
19
18
17
16
15

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74ABT544D Summary of contents

Page 1

... The outputs are guaranteed to sink 64mA. TEMPERATURE RANGE ORDER CODE – +85 C 74ABT544N – +85 C 74ABT544D – +85 C 74ABT544DB LOGIC SYMBOL ...

Page 2

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) PIN DESCRIPTION PIN NUMBER SYMBOL 14, 1 LEAB / LEBA 11, 23 EAB / EBA 13, 2 OEAB / OEBA – 22, 21, 20, 19, B0 – B7 18, 17, 16 GND ...

Page 3

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) LOGIC DIAGRAM OEBA 23 EBA 1 LEBA FUNCTION TABLE INPUTS OEXX EXX LEXX ...

Page 4

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER V DC supply voltage input diode current input voltage output diode current output voltage OUT I DC output current ...

Page 5

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) DC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER V Input clamp voltage IK V High-level output voltage OH V Low-level output voltage OL Power-up output low V RST 3 voltage I Input leakage Control pins I current Data pins I Power-off leakage current ...

Page 6

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) AC CHARACTERISTICS GND = 0V 2.5ns 50pF 500 SYMBOL PARAMETER t Propagation delay PLH Bn PHL t Propagation delay PLH t LEBA to An, LEAB to Bn PHL t Output enable time ...

Page 7

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) AC WAVEFORMS V = 1.5V GND to 3. PHL V OUT V M Waveform 1. Propagation Delay For Inverting Output An, Bn LEAB, LEBA OEAB, OEBA EAB, EBA t PZH An Waveform 4. 3–State Output Enable Time to High Level and Output Disable Time from High Level NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance ...

Page 8

... Philips Semiconductors Advanced BiCMOS Products Octal latched transceiver with dual enable, inverting (3-State) TEST CIRCUIT AND WAVEFORM OUT PULSE D.U.T GENERATOR R T Test Circuit for 3-State Outputs SWITCH POSITION TEST SWITCH t closed PLZ t closed PZL All other open DEFINITIONS R = Load resistor; see AC CHARACTERISTICS for value. ...

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