74ACT74B STMicroelectronics, 74ACT74B Datasheet

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74ACT74B

Manufacturer Part Number
74ACT74B
Description
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
Manufacturer
STMicroelectronics
Datasheet
DESCRIPTION
The ACT74 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and
technology.
A signal on the D INPUT is transferred to the Q
OUTPUT during the positive going transition of
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 1997
HIGH SPEED:
f
LOW POWER DISSIPATION:
I
COMPATIBLE WITH TTL OUTPUTS
V
50 TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
MAX
CC
PLH
OH
IH
CC
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
= 4 A (MAX.) at T
| = I
= 2V (MIN), V
(OPR) = 4.5V to 5.5V
= 250 MHz (TYP.) at V
double-layer
t
PHL
OL
= 24 mA (MIN)
IL
= 0.8V (MAX)
metal
A
= 25
CC
o
C
= 5V
wiring
C
2
MOS
the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
It is ideal for low power applications mantaining
high speed operation similar to equivalent Bipolar
Schottky TTL.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
(Plastic Package)
74ACT74B
B
ORDER CODES :
(Micro Package)
74ACT74
74ACT74M
M
1/11

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74ACT74B Summary of contents

Page 1

... OUTPUT during the positive going transition of PIN CONNECTION AND IEC LOGIC SYMBOLS April 1997 B (Plastic Package) ORDER CODES : 74ACT74B the clock pulse. CLEAR and PRESET are independent of the clock and accomplished by a low setting on the appropriate input ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL ...

Page 2

INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE INPUTS CLR Don’t Care LOGIC DIAGRAMS This logic diagram has not ...

Page 3

ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply Voltage Input Voltage I DC Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 4

DC SPECIFICATIONS Symbol Parameter V High Level Input Voltage IH V Low Level Input Voltage IL V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage Current I I Max I /Input CCT CC ...

Page 5

AC ELECTRICAL CHARACTERISTICS (C Symbol Parameter t Propagation Delay Time PLH PHL t Propagation Delay Time PLH CLR PHL t CK Pulse Width, HIGH w or LOW t Setup ...

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TEST CIRCUIT equivalent (includes jig and probe capacitance 500 or equivalent pulse generator (typically OUT WAVEFORM 1: PROPAGATION DELAYS, SETUP AND ...

Page 7

WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 74ACT74 7/11 ...

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WAVEFORM 3: RECOVERY TIMES (f=1MHz; 50% duty cycle) WAVEFORM 3: PULSE WIDTH 8/11 ...

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Plastic DIP14 MECHANICAL DATA mm DIM. MIN. TYP. a1 0.51 B 1.39 b 0 8.5 e 2.54 e3 15. 3.3 Z 1.27 inch MAX. MIN. TYP. 0.020 1.65 0.055 0.020 0.010 20 0.335 ...

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SO14 MECHANICAL DATA DIM. MIN. TYP 0 0. 8.55 E 5.8 e 1.27 e3 7.62 F 3.8 G 4 10/11 mm MAX. MIN. 1.75 0.2 0.003 ...

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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsabilit y for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from ...

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