74AUP1G02 Philips Semiconductors, 74AUP1G02 Datasheet

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74AUP1G02

Manufacturer Part Number
74AUP1G02
Description
Low-power 2-input NOR gate
Manufacturer
Philips Semiconductors
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP1G02GW
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
1. General description
2. Features
The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
The 74AUP1G02 provides the single 2-input NOR function.
CC
74AUP1G02
Low-power 2-input NOR gate
Rev. 01 — 18 July 2005
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114-C exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 A (maximum)
CC
Product data sheet
OFF
www.DataSheet4U.com
.

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74AUP1G02 Summary of contents

Page 1

... Low-power 2-input NOR gate Rev. 01 — 18 July 2005 1. General description The 74AUP1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V ...

Page 2

... GND Description TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 Marking Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Min Typ = 17 2.5 5 1.6 3 ...

Page 3

... 001aab610 Pin description Pin TSSOP5 XSON6 Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate mna165 Fig 2. IEC logic symbol Y mna166 n.c. GND 001aab611 Transparent top view Fig 5. Pin confi ...

Page 4

... Power-down mode output current quiescent supply current ground current storage temperature total power +125 C amb dissipation Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Output Min Max 0.5 +4 [1] 0.5 +4.6 < ...

Page 5

... 1 2 3 2 4 Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Min Max Unit 0 +125 C 0 200 ns/V Min Typ Max Unit 0 ...

Page 6

... 2 4 GND Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Min Typ Max - - 0 1 ...

Page 7

... 3 0 GND GND. CC Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Min Typ Max - - 0 ...

Page 8

... Figure Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate [1] Min Typ Max Unit - 17 2.5 5.1 10.8 ns 1.6 3.7 6.7 ns 1.3 3.0 5.3 ns 1.0 2.4 3.9 ns 1.0 2.2 3 ...

Page 9

... 1. 1. 2 3.6 V 0.8 CC Figure 1 1 1 1. 2 3.6 V 1.2 CC Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate [1] Min Typ Max [2] [ +125 C Max Min Max 12.1 2.1 13.4 7.8 1.4 8 ...

Page 10

... GND output V OL Table 11. and V are typical output voltage drop that occur with the output load Measurement points Output Input 0.5 V 0.5 CC Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate +125 C Max Min Max 16.4 3.1 18.1 10.4 2.0 11.5 8.3 1.7 9.2 6.3 1.5 7.0 5.7 1.4 6.3 22.4 4.1 24.7 13 ...

Page 11

... Test data Load [ pF and for measuring propagation delays, setup and hold times Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate EXT DUT ...

Page 12

... 1 scale (1) ( 0.30 0.25 2.25 1.35 2.25 0.65 1.3 0.15 0.08 1.85 1.15 REFERENCES JEDEC JEITA MO-203 SC-88A Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate detail 0.46 0.60 0.425 0.3 0.1 0.1 2.0 0.21 0.15 EUROPEAN ISSUE DATE ...

Page 13

... scale 0.35 0.40 0.6 0.5 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate SOT886 4 ( EUROPEAN ISSUE DATE PROJECTION 04-07-15 04-07-22 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 14

... Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate Doc. number Supersedes 9397 750 14671 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 15

... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 01 — 18 July 2005 74AUP1G02 www.DataSheet4U.com Low-power 2-input NOR gate © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 16

... Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 20 Trademarks Contact information . . . . . . . . . . . . . . . . . . . . 15 74AUP1G02 Low-power 2-input NOR gate © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice ...

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