LM4545 National Semiconductor, LM4545 Datasheet - Page 14
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LM4545
Manufacturer Part Number
LM4545
Description
AC 97 Codec with Stereo Headphone Amplifier and National 3D Sound
Manufacturer
National Semiconductor
Datasheet
1.LM4545.pdf
(16 pages)
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Application Information
SD_IN Slot 1: Status Address
The slot echoes the control register which a read was re-
quested on. The address echoed was initiated by a read re-
quest in the previous SD_OUT frame, slot 1.
SD_IN Slot 2: Status Data
The slot returns the control register data. The data returned
was initiated by a read request in the previous SD_OUT
frame, slot 1.
SD_IN Slot 3: PCM Record Left Channel
This slot contains the left ADC sample data. The signal digi-
tized is selected via register 1Ah and subsequently routed
through the Input Mux for recording by the left ADC.
SD_IN Slot 4: PCM Record Right Channel
This slot contains the right ADC sample data. The signal digi-
tized is selected via register 1Ah and subsequently routed
through the Input Mux for recording by the right ADC.
18:12
11:0
19:4
19:2
19:2
Bits
Bits
Bits
Bits
Bit
3:0
1:0
1:0
15
14
13
12
11
19
Register Index
Register Read
Right Channel
Codec Ready
PCM Record
PCM Record
Left Channel
Description
Description
Description
Description
Description
Slot 1 data
Slot 2 data
Slot 3 data
Slot 4 data
Reserved
Reserved
Reserved
Reserved
Reserved
Control
Control
valid
valid
valid
valid
Data
data
data
Bit
Right Audio PCM Data is
18 bit audio sample from
18 bit audio sample from
Echo of Control Register
0=Not Ready, 1=Ready
Left Audio PCM Data is
Status Address is valid
for which data is being
Status Data is valid
Stuffed with 0 ’s
Stuffed with 0 ’s
Stuffed with 0 ’s
Stuffed with 0 ’s
Stuffed with 0
Comment
Comment
Comment
Comment
Comment
right ADC
returned.
left ADC
(Continued)
valid
valid
14
SD_IN Slots 5-12: Reserved
These SD_IN slots are set to 0 as they are reserved for fu-
ture use.
AC Link Low Power Mode
Reset Register (00h)
Writing any value to this register causes a register reset
which changes all of the registers back to their default val-
ues. If a read is performed on this register, the LM4545 will
return a value of 0D50h implying that National 3D Sound is
implemented, 18bit data is supported for both the ADC’s and
DAC’s and the stereo headphone function is supported.
Master Volume Registers (02h, 04h, 06h)
These registers allows the output levels from LINE_OUT
port, HP_OUT port and MONO_OUT port to be attenuated or
muted. Each step is nominally 1.5dB and each output can be
individually muted by setting the most significant bit to 1.
PC Beep Register (0Ah)
This register controls the level of the PC_BEEP input. The
PC_BEEP can be both attenuated and muted via register
0Ah. Step size is nominally 3dB. The signal present after the
attenuation and mute block is summed into both the left and
right channels.
Mixer Input Volume Registers (Index 0Ch - 18h)
These registers control the input volume controls including
mute. Each volume control is 5 bit which provides from a
range of +12dB gain to 34.5dB attenuation. For stereo ports,
the left and right levels can be independently set. Muting a
given port is accomplished by setting the MSB to 1. Setting
the MSB to 1 for stereo ports mutes both the left and right
channel. Register 0Eh has an additional 20dB boost for a mi-
crophone level input. This is enabled by setting bit 6 of reg-
ister 0Eh to 1.
Default: 8000h
Default: 8000h
Mute
Mute
0
0
0
1
0
0
1
FIGURE 8. AC Link Powerdown Timing
XX XXXX
Mx5:Mx0
1X XXXX
00 0000
01 1111
PV3:0
XXXX
0000
1111
46.5dB attenuation
46.5dB attenuation
45dB attenuation
0dB attenuation
0dB attenuation
Function
Function
mute
mute
DS100069-9