MC74HCT241A Motorola, MC74HCT241A Datasheet

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MC74HCT241A

Manufacturer Part Number
MC74HCT241A
Description
Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
Manufacturer
Motorola
Datasheet

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Manufacturer
Quantity
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Part Number:
MC74HCT241ADTR2G
Manufacturer:
ON Semiconductor
Quantity:
3 200
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
may be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT241A is an octal noninverting buffer/line
driver/line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
non–inverted outputs and two output enables. Enable A is active–low and
Enable B is active–high.
2/97
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
ENABLES
DATA INPUTS
OUTPUT
Motorola, Inc. 1997
The MC54/74HCT241A is identical in pinout to the LS241. This device
The HCT241A is similar in function to the HCT244. See also HCT240.
Output Drive Capability: 15 LSTTL Loads
TTL/NMOS–Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1 A
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 118 FETs or 29.5 Equivalent Gates
ENABLE A
ENABLE B
A1
A2
A3
A4
B1
B2
B3
B4
2
4
6
8
11
13
15
17
1
19
LOGIC DIAGRAM
1
PIN 20 = V CC
PIN 10 = GND
18
16
14
12
9
7
5
3
YA1
YA2
YA3
YA4
YB1
YB2
YB3
YB4
NONINVERTING
OUTPUTS
MC54/74HCT241A
REV 7
20
20
20
ENABLE A
1
1
MC54HCTXXXAJ
MC74HCTXXXAN
MC74HCTXXXADW
Z = high impedance
X = don’t care
1
ORDERING INFORMATION
Enable A
Enable B
GND
YB3
YB4
YB2
YB1
A1
A2
A3
A4
FUNCTION TABLE
PIN ASSIGNMENT
H
H
H
L
L
L
Inputs
Inputs
1
2
3
4
5
6
7
8
9
10
A
H
X
B
H
X
L
L
CERAMIC PACKAGE
PLASTIC PACKAGE
SOIC PACKAGE
20
19
18
17
16
15
14
13
12
CASE 751D–04
11
CASE 732–03
CASE 738–03
DW SUFFIX
N SUFFIX
J SUFFIX
Output
Output
Ceramic
Plastic
SOIC
V CC
ENABLE B
YA1
B4
YA2
B3
YA3
B2
YA4
B1
YB
YA
H
H
L
Z
L
Z

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MC74HCT241A Summary of contents

Page 1

... Chip Complexity: 118 FETs or 29.5 Equivalent Gates LOGIC DIAGRAM DATA INPUTS OUTPUT ENABLE A 19 ENABLES ENABLE B 2/97 Motorola, Inc. 1997 MC54/74HCT241A YA1 16 YA2 14 YA3 12 YA4 NONINVERTING OUTPUTS 9 YB1 7 YB2 5 YB3 3 YB4 PIN PIN 10 = GND 1 REV 7 ...

Page 2

... Ceramic DIP: – from 100 _ to 125 _ C SOIC Package: – from 125 _ C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...

Page 3

... Current Current Î Î Î Î Î Î Î Î Î NOTES: 1. Information on typical parametric values along with frequency or heavy load considerations can be found in Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). 2. Total Supply Current = High–Speed CMOS Logic Data DL129 — ...

Page 4

... NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). ...

Page 5

... TO THREE OTHER INPUT A INPUT B ENABLE A OUTPUT ENABLES ENABLE B High–Speed CMOS Logic Data DL129 — Rev 6 LOGIC DETAIL TO THREE OTHER “A” BUFFERS “B” BUFFERS TWO OF 8 BUFFERS 5 MC54/74HCT241A MOTOROLA ...

Page 6

... PLANE –A– –B– 20X 0.010 (0.25 18X K MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 732–03 ISSUE SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE ...

Page 7

... Motorola, Inc. Motorola, Inc Equal Mfax is a trademark of Motorola, Inc. JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 7 MC74HCT241A/D MOTOROLA ...

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