HD1-6408-9 Intersil Corporation, HD1-6408-9 Datasheet - Page 3
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HD1-6408-9
Manufacturer Part Number
HD1-6408-9
Description
CMOS Asynchronous Serial Manchester Adapter (ASMA)
Manufacturer
Intersil Corporation
Datasheet
1.HD1-6408-9.pdf
(11 pages)
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
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Part Number:
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Pin Description
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
TYPE
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
SYMBOL
GND
BOO
ESC
SDO
DSC
CDS
DBS
BZO
V
VW
BOI
UDI
SDI
SCI
DC
BZI
DR
MR
TD
EE
SS
SD
EC
OI
CC
SECTION
Decoder
Encoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Both
Both
Both
Output high indicates receipt of a VALID WORD.
ENCODER SHIFT CLOCK is an output for shifting data into the Encoder. The En-
coder samples SDI on the low-to-high transition of ESC.
TAKE DATA output is high during receipt of data after identification of a sync pulse
and two valid Manchester data bits.
SERIAL DATA OUT delivers received data in correct NRZ format.
DECODER CLOCK input drives the transition finder, and the synchronizer which
in turn supplies the clock to the balance of the Decoder. Input a frequency equal to
12X the data rate.
A high input should be applied to BIPOLAR ZERO IN when the bus is in its negative
state. This pin must be held high when the Unipolar input is used.
A high input should be applied to BIPOLAR ONE IN when the bus is in its positive
state, this pin must be held low when the Unipolar input is used.
With pin 6 high and pin 7 low, this pin enters UNIPOLAR DATA IN to the transition
finder circuit. If not used this input must be held low.
DECODER SHIFT CLOCK output delivers a frequency (DECODER CLOCK 12),
synchronized by the recovered serial data stream.
COMMAND/DATA SYNC output high occurs during output of decoded data which
was preceded by a Command synchronizing character. A low output indicates a
Data synchronizing character.
A high input to DECODER RESET during a rising edge of DECODER SHIFT
CLOCK resets the decoder bit counting logic to a condition ready for a new word.
GROUND supply pin.
A high on MASTER RESET clears the 2:1 counters in both the encoder and decod-
er and the
DIVIDE BY SIX is an output from 6:1 divider which is driven by the ENCODER
CLOCK.
BIPOLAR ZERO OUT is a active low output designed to drive the zero or negative
sense of a bipolar line driver.
A low on OUTPUT INHIBIT forces pin 15 and 17 high, their inactive states.
BIPOLAR ONE OUT is an active low output designed to drive the one or positive
sense of a bipolar line driver.
SERIAL DATA IN accepts a serial data stream at a data rate equal to ENCODER
SHIFT CLOCK.
A high on ENCODER ENABLE initiates the encode cycle. (Subject to the preced-
ing cycle being completed).
SYNC SELECT actuates a Command sync for an input high and data sync for an
input low.
SEND DATA is an active high output which enables the external source of serial
data.
SEND CLOCK IN is 2X the Encoder data rate.
ENCODER CLOCK is the input to the 6:1 divider.
V
to GND (pin 12) is recommended.
CC
HD-6408
is the +5V power supply pin. A 0.1 F decoupling capacitor from V
5-3
6 counter.
DESCRIPTION
CC
(pin 24)