LM1229 National Semiconductor, LM1229 Datasheet
LM1229
Related parts for LM1229
LM1229 Summary of contents
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... A vertical blanking output pulse is provided which can drive a G1 blanking amplifier such as the one in National’s LM2485 clamp IC. The LM1229 RGB outputs are compatible with National’s high gain drivers (http://www.national.com). The Deflection section uses a 12.0 MHz resonator and with it the horizontal processor is capable of locking to seven different television signal formats, 15 ...
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... LM1229 Package and Pinout Non-Exposed DAP — NS Package Number VEC64A www.national.com Non-Exposed DAP — Order Number LM1229VEC Exposed DAP — Order Number LM1229YA Exposed DAP — NS Package Number VXE64A FIGURE 1. 2 20118701 ...
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... Maximum contrast attenuation. V MIN A V MAX @ A Gain attenuation V 50% GAIN (Notes 1, Thermal Resistance LM1229YA (θ DAP not soldered Thermal Resistance LM1229YA (θ DAP soldered Junction Temperature (T ESD Susceptibility (Note 4) ESD Machine Model (Note 13) 6.0V Storage Temperature 1.0 mA Lead Temperature (Soldering, 10 sec.) –0.5V ≤ V ≤ ...
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Video Signal Electrical Characteristics Unless otherwise noted 25˚ (Note 7) for Min and Max parameters and (Note 6) for Typicals. Symbol Parameter A / Maximum gain attenuation. V MIN GAIN A V MAX GAIN A Maximum ...
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OSD Electrical Characteristics Unless otherwise noted 25˚ Symbol Parameter BOTH MODES I Low input current (OSD and LOW Enable). I High input current (OSD and HIGH Enable). SEP Crosstalk from video 10 kHz SEP Crosstalk from ...
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Deflection Signal Characteristics Unless otherwise noted 25˚ eters and (Note 6) for Typicals. Symbol Parameter I HDRIVE Max sink current HDO V HDRIVE Max high level output HDOH voltage δ HDRIVE Duty cycle t Delay to ...
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System Interface Signal Characteristics Unless otherwise noted 25˚ for Min and Max parameters and (Note 6) for Typicals. Symbol Parameter I Logic low input current L (SCL, SDA, HSYNC, VSYNC) I Logic high input current H ...
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... Note 15: A minimum pulse width of 200 ns is the guaranteed minimum for a horizontal line of 15 kHz. This limit is guaranteed by design lower line rate is used then a longer clamp pulse may be required. Note 16: Once the spot killer has been activated, the LM1229 remains in the off state until V Note 17: Video input = 0.7 V and the OSD Enable is active with the OSD inputs at black ...
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... LM1229 Test Circuit (Continued) FIGURE 2. LM1229 Test Circuit 9 20118702 www.national.com ...
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Application Information PIN CONNECTIONS Pin Pin Name No ALC 2 C OSC 3 VDRIVE OUT 4 VDRIVE REF 5 V Caps REF VEHT1 9 VEHT2 www.national.com Schematic C is the feedback loop filter ...
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... Power supply and ground pin for all the LM1229. Note the recommended charge storage and high frequency capacitors which should be as close to pins wherever possible. ...
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Application Information Pin Pin Name No. 18 Horizontal Flyback 19 FREQ1 22 FREQ2 20 HEHT 21 REHT1 24 REHT2 25 FILTER2 28 FILTER1 www.national.com (Continued) Schematic The input is a threshold detector at approximately 2.4V limit the combined ...
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... R B amplitude of the flyback pulse. This provides X-ray protection by turning off the horizontal drive. After the shutdown, the LM1229 will be reset when V HDRIVE output is disabled and reenabled with bit 5 of the HEHT register. This shutdown function can be disabled by setting bit 6 of the HEHT register ...
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... Signal input amplitudes larger than 0.7V are not recommended. The external ESD diodes are recommended if the input OSD video is generated some distance away from the LM1229. The 75Ω termination may not be needed if the signal amplitude is already 0.7V. This input accepts either TTL or CMOS input levels. When this input is a “ ...
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... When the current resupplying the CRT capacitance (averaged by C exceeds this limit, then D begin to turn off and the voltage at pin 51 begins to drop. The LM1229 then lowers the gain of the three video channels until the beam current reaches an equilibrium value. The 1N4148 is needed to prevent overcurrent in D where the ABL limit is greater than 1 mA ...
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... The contrast of the OSD can be controlled with the OSD_Cont bits, OSD[1:0]. The OSD Enable input causes the LM1229 output to switch from video to OSD. Depending on the TRANS bit, 0x0B[3], the OSD background will be either black or video with contrast setting determined by the OSD TRANS register, 0x0A[6:0] ...
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... Application Information HIGHLIGHT WINDOW The OSD Enable input to the LM1229 can also be used to highlight an area of the video by setting the DA bit to 0 (for digital OSD) and the TRANS bit The OSD TRANS register must be set to some value higher than the CONTRAST register. Then whenever the OSD Enable input is high, the video will have the higher contrast setting ...
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Tables These are the tables which are referenced in the text. TRANS ENABLE 0 0 Normal video display Foreground and background determined by OSD inputs Normal video display Foreground and background determined by OSD ...
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... Start Pulse, the Slave Device Read Address (0xBB), and the Acknowledge bit. The next 8 bits will be the actual data sent by the LM1229 preamp as clocked out by the Master. Subsequent bytes that are read will correspond to the next incremented address locations ...
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Microcontroller Interface conductor may use some additional addresses for produc- tion testing. Writing to an address outside the ranges shown here could have unpredictable or even destructive results. Note the address gap between the RGB and deflection control registers. This ...
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Application Register Detail GREEN Gain Control Register Addr Bit 7 GREEN GAIN 0x01 X Bits 6–0: Sets the gain level of the green video channel. A value of 0x7F generates the maximum green gain. A value of 0x00 generates the ...
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... Bit 2: When set to 0, horizontal blanking at the RGB outputs is disabled. When set to 1, horizontal blanking is enabled. Bit 1: When set to 0, the LM1229 is in normal operation. When set put into the power save mode for reduced power consumption. ...
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Application Register Detail HORIZONTAL EHT CORRECTION Register Addr Bit 7 HEHT 0x42 EQPRM Bit 7: When this bit attempt is made to remove HSYNC equalizing pulses. When set HSYNC equalizing pulses are removed. ...
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... When this bit is set the vertical output ramp is active. When set the ramp is turned off (set to the vertical DC reference) to produce the service line used for color temperature setup. Bit 1: When this bit is set the LM1229 expects negative going vertical sync input. When this bit expects positive going sync. Bit 0: When this bit is set the LM1229 expects negative going horizontal sync input ...
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Application Register Detail VERTICAL BLANKING OUTPUT Register Addr Bit 7 VBLANK 0x51 X Bits 6–0: These bits determine the duration of the vertical blanking output in horizontal lines, as counted by the horizontal sync input. (Continued) Bit 6 Bit 5 ...
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... Physical Dimensions www.national.com inches (millimeters) unless otherwise noted Order Number LM1229VEC NS Package Number VEC64A Order Number LM1229YA NS Package Number VXE64A 26 ...
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... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...