PDSP16488AMA Mitel Networks Corporation, PDSP16488AMA Datasheet - Page 14

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PDSP16488AMA

Manufacturer Part Number
PDSP16488AMA
Description
Single Chip 2D Convolver with Integral Line Delays
Manufacturer
Mitel Networks Corporation
Datasheet
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PDSP16488A MA
ABSOLUTE MAXIMUM RATINGS [See Notes]
Supply voltage Vcc
Input voltage V
Output voltage V
Clamp diode current per pin I
Static discharge voltage (HMB)
Storage temperature T
Max. junction temperature Military
Package power dissipation
Thermal resistances, junction to case ø
NOTES ON MAXIMUM RATINGS
1. Exceeding these ratings may cause permanent damage.
Functional operation under these conditions is not implied.
2. Maximum dissipation or 1 second should not be exceeded,
only one output to be tested at any one time.
3. Exposure to absolute maximum ratings for extended
periods may affect device reliablity.
4. Current is defined as negative into the device.
14
STATIC ELECTRICAL CHARACTERISTICS
NOTE: Signal pins
Signal pins
BIT
0
0
1
1
3:2
3:2
3:2
3:2
4
4
7:5
Characteristic
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input leakage current
Input capacitance
Output leakage current
Output S/C current
Operating Conditions (unless otherwise stated)
T
amb
CODE
0
1
0
1
00
01
10
11
0
1
XXX
=-55°C to +125°C. V
REGISTER D Bit Allocation
IN
OUT
and
S
, X15,
FUNCTION
X15:0 Not delayed
X15:0 Delayed
Internal sum not shifted
Internal sum multiplied by 256
I/P to line stores not delayed
I/P to line stores delayed by 4
I/P to line stores delayed by 8
I/P to line stores delayed by 12
2's complement pixel data input
output.
Un-signed pixel data input
Add 0 to 7 clock delays to DELOP
require external pull-up resistors in EPROM mode.
Symbol
K
(see note 2)
V
V
V
C
V
I
I
I
OZ
SC
IN
OH
OL
IH
IL
IN
cc
= 5.0v ± 10%
JC
,
-0.5V to Vcc + 0.5V
-0.5V to Vcc + 0.5V
Min.
-10
-50
2.4
2.0
10
-
-
-65°C to 150°C
-0.5V to 7.0V
Value
, BYPASS and 0V have pull-up resistors in the range 15kΩ to 200kΩ.
Typ.
10
3000mW
5°C/W
150°C
18mA
500V
Max.
+10
+50
300
0.4
0.8
-
-
BIT 0
BIT 1
BITS 3::2 These bits define the delays on both sets of pixel
BIT 4
BIT 7:5
Units
mA
µA
µA
pF
V
V
V
V
Delay from output
high impedance to
output low
Delay from output
high impedance to
output high
V
V
Delay from output
high to output
high impedance
Delay from output
low to output
high impedance
H
L
- Voltage reached when output driven high
- Voltage reached when output driven low
Test
Subgroup
If this bit is set the expansion data input is delayed
by four pixel clocks before it is added to the present
convolver output. It is used in multiple device
systems when the partial window width is 8 pixels.
When this bit is set the internal sum is shifted to the
left by 8 places before being added to the expan-
sion input. It is used when two devices are used,
each in an 8 bit pixel mode, to fabricate a 16 bit
pixel mode.
inputs before entering the line stores. The delays
are always identical on both sets.
When this bit is set the convolver interprets 8 or 16
bit pixels as 2's complement signed numbers
These bits add 0 to 7 additional clock delays to
those selected by Register C, bits 3:1.
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1.5V
1.5V
V
V
Waveform - measurement level
H
L
Conditions
I
I
Except CLK,
GND < V
GND < V
V
OH
OL
CC
= -4mA
= 4mA
= Max
IN
OUT
< V
< V
CC
0.5V
0.5V
0.5V
0.5V
CC
.No internal pull up
.No internal pull up
= 4V

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