87C575 Philips Semiconductors, 87C575 Datasheet - Page 28

• Manufacturer Part Number: 87C575
• Description: 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless/ 4 comparator/ failure detect circuitry/ watchdog timer
• Manufacturer: Philips Semiconductors

1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
3. Interfacing the 80C32/52 to devices with float times up to 45ns is permitted. This limited bus contention will not cause damage to Port 0
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS
T
NOTES:
1998 May 01
amb
1/t
OSCF
TR
t
t
t
t
t
t
t
t
t
t
t
Data Memory
t
t
t
t
t
t
t
t
t
t
t
t
t
External Clock
t
t
t
t
Shift Register
t
t
t
t
t
SYMBOL
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
AVIV
PLAZ
RLRH
WLWH
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
QVWX
WHQX
RLAZ
WHLH
CHCX
CLCX
CLCH
CHCL
XLXL
QVXH
XHQX
XHDX
XHDV
80C51 8-bit microcontroller family
8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer
drivers.
CLCL
= 0 C to +70 C and –40 C to +125 C, V
FIGURE
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
23, 24
22
22
22
22
22
22
22
22
22
22
22
22
26
26
26
26
25
25
25
25
25
Oscillator frequency: Speed Versions
Oscillator fail detect frequency
Comparator response time
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
RD low to address float
RD or WR high to ALE high
High time
Low time
Rise time
Fall time
Serial port clock cycle time
Output data setup to clock rising edge
Output data hold after clock rising edge
Input data hold after clock rising edge
Clock rising edge to input data valid
8XC575
CC
= 5V 10%, V
PARAMETER
E
SS
= 0V
1, 2
28
10t
6t
6t
2t
3t
3t
4t
2t
t
t
t
t
t
t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
12t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
MIN
0.6
12
12
CLCL
6
0
0
0
VARIABLE CLOCK
–25
–25
–25
–100
–100
–30
–25
–25
–40
–45
–50
–75
–133
–60
80C575/83C575/
10t
5t
8t
9t
4t
3t
5t
2t
3t
t
t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
MAX
5.5
16
10
10
20
20
0
–25
–150
–165
+25
–110
+50
–75
–70
–85
–28
–133
Product specification
87C575
UNIT
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s