LM3S328 Luminary Micro, Inc., LM3S328 Datasheet - Page 322

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LM3S328

Manufacturer Part Number
LM3S328
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet

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Inter-Integrated Circuit (I2C) Interface
322
Reset
Reset
Reset
Reset
Type
Type
Type
Type
Read-Only Status Register
Bit/Field
I2C Slave Status Register (I2CSCSR): Read
Offset 0x004
I2C Slave Control Register (I2CSCSR): Write
Offset 0x004
31:2
1
RO
RO
RO
RO
31
15
31
15
0
0
0
0
Register 11: I
This register accesses one control bit when written, and two status bits when read.
The read-only Status register consists of two bits: the RREQ bit and the TREQ bit. The Receive
Request (RREQ) bit indicates that the Stellaris I
master. Read one data byte from the I2C Slave Data (I2CSDR) register. The Transmit
Request (TREQ) bit indicates that the Stellaris I
Write one data byte into theI2C Slave Data (I2CSDR) register.
The write-only Control register consists of one bit: the DA bit. The DA bit enables and disables the
Stellaris I
RO
RO
RO
RO
30
14
30
14
0
0
0
0
reserved
RO
RO
RO
RO
TREQ
Name
29
13
29
13
0
0
0
0
2
C slave operation.
RO
RO
RO
RO
28
12
28
12
2
0
0
0
0
C Slave Control/Status (I2CSCSR), offset 0x004
RO
RO
RO
RO
27
11
27
11
0
0
0
0
Type
RO
RO
RO
RO
RO
RO
26
10
26
10
0
0
0
0
RO
RO
RO
RO
25
25
0
9
0
0
9
0
Reset
Preliminary
reserved
reserved
0
0
RO
RO
RO
RO
24
24
0
8
0
0
8
0
reserved
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
This bit specifies the state of the I
outstanding transmit requests. If set, the I
addressed as a slave transmitter and uses clock
stretching to delay the master until data has been written
to the I2CSDR register. Otherwise, there is no outstanding
transmit request.
RO
RO
RO
RO
23
23
0
7
0
0
7
0
2
2
C device has received a data byte from an I
C device is addressed as a Slave Transmitter.
RO
RO
RO
RO
22
22
0
6
0
0
6
0
RO
RO
RO
RO
21
21
0
5
0
0
5
0
RO
RO
RO
RO
20
20
0
4
0
0
4
0
RO
RO
RO
RO
19
19
0
3
0
0
3
0
2
C slave with regards to
RO
RO
RO
RO
18
18
0
2
0
0
2
0
2
C unit has been
October 8, 2006
TREQ
RO
RO
RO
RO
17
17
0
1
0
0
1
0
RREQ
RO
RO
RO
DA
WO
16
16
0
0
0
0
0
0
2
C

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