LM3S328-IQN25(T) Luminary Micro, Inc., LM3S328-IQN25(T) Datasheet - Page 214
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LM3S328-IQN25(T)
Manufacturer Part Number
LM3S328-IQN25(T)
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S328-IQN25T.pdf
(359 pages)
- Current page: 214 of 359
- Download datasheet (3Mb)
Analog-to-Digital Converter (ADC)
214
Reset
Reset
Type
Type
Bit/Field
ADC Sample Sequence Control 0 (ADCSSCTL0)
Offset 0x044
31
30
29
28
27
26
25
TS7
TS3
R/W
R/W
31
15
0
0
Register 12: ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 0. When configuring a sample sequence, the END bit must be set at some
point, whether it be after the first sample, last sample, or any sample in between.
This register is 32-bits wide and contains information for eight possible samples.
IE7
R/W
IE3
R/W
30
14
0
0
Name
END7
END6
END7
END3
TS7
TS6
IE7
IE6
D7
R/W
R/W
29
13
0
0
D7
R/W
D3
R/W
28
12
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TS6
TS2
R/W
R/W
27
11
0
0
IE6
R/W
IE2
R/W
26
10
0
0
Reset
0
0
0
0
0
0
0
END6
END2
R/W
R/W
25
0
9
0
Preliminary
Description
The TS7 bit is used during the eighth sample of the sample
sequence and specifies the input source of the sample. If set,
the temperature sensor is read. Otherwise, the input pin
specified by the ADCAMUX register is read.
The IE7 bit is used during the eighth sample of the sample
sequence and specifies whether the raw interrupt signal (INR0
bit) is asserted at the end of the sample's conversion. If the
MASK0 bit in the ADCIM register is set, the interrupt is
promoted to a controller-level interrupt. When this bit is set, the
raw interrupt is asserted, otherwise it is not. It is legal to have
multiple samples within a sequence generate interrupts.
The END7 bit indicates that this is the last sample of the
sequence. It is possible to end the sequence on any sample
position. Samples defined after the sample containing a set
END are not requested for conversion even though the fields
may be non-zero. It is required that software write the END bit
somewhere within the sequence. (Sample Sequencer 3,
which only has a single sample in the sequence, is hardwired
to have the END0 bit set.)
Setting this bit indicates that this sample is the last in the
sequence.
The D7 bit indicates that the analog input is to be differentially
sampled. The corresponding ADCSSMUXx nibble must be set
to the pair number "i", where the paired inputs are "2i and 2i+1".
The temperature sensor does not have a differential option.
When set, the analog inputs are differentially sampled.
Same definition as TS7 but used during the seventh sample.
Same definition as IE7 but used during the seventh sample.
Same definition as END7 but used during the seventh sample.
D6
R/W
D2
R/W
24
0
8
0
TS5
TS1
R/W
R/W
23
0
7
0
IE5
R/W
IE1
R/W
22
0
6
0
END5
END1
R/W
R/W
21
0
5
0
D5
R/W
D1
R/W
20
0
4
0
TS4
TS0
R/W
R/W
19
0
3
0
IE4
R/W
IE0
R/W
18
0
2
0
October 8, 2006
END4
END0
R/W
R/W
17
0
1
0
D4
R/W
D0
R/W
16
0
0
0
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