AN2074 Freescale Semiconductor / Motorola, AN2074 Datasheet - Page 18

• Manufacturer Part Number: AN2074
• Description: DSP56300 JTAG Examples
• Manufacturer: Freescale Semiconductor / Motorola

3.2 Entering the Run-Test/Idle State
JTAG_RTI_SEQ:
START
JTAG_RTI:
3.2.1 JTAG_RTI Subroutine
18
Entering the Run-Test/Idle State
The TAP controller must be initialized into the Test-Logic-Reset state to keep the test logic transparent to
the DSP56300 system logic. This operation is done by performing one of the following after power-up:
The subroutine JTAG_RTI shown in Example 9 and described in Section 3.2.1 forces the TAP to enter
the Test-Logic-Reset state (by asserting
state (by deasserting
The JTAG_RTI subroutine sends a sequence of 8-bit data to the JTAG_EXECUTE subroutine. The bit
definitions are as Table 5 shows:
For example, a value of $30 (bit 5 = 1 and bit 4 = 1) indicates that
rising edge of
value $30 five times to enter the Test-Reset-Logic state and then sends a value of $10 (
TDO
•
•
org
dc
dc
dc
dc
dc
dc
dc
org
...
jsr
...
move
jsr
rts
is not read) to enter the Run-Test/Idle state.
Asserting
Sampling
Reserved
7-6
x:
$30
$30
$30
$30
$30
$10
$00
p:$100
JTAG_RTI
#JTAG_RTI_SEQ,r0
JTAG_EXECUTE
TCK
TRST
TMS
. Since bit 2 = 0,
; go to next state
; go to next state
; go to next state
; go to next state
; go to next state
; go to Run-Test-Idle
; EXIT
TMS
TMS to send
as a logical 1 for five consecutive
).
Table 5. Subroutine Sequence Bit Definitions
Freescale Semiconductor, Inc.
Example 9. Entering Run-Test/Idle Routine
5
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DSP56300 JTAG Examples
TDO
TDI
Go to: www.freescale.com
TMS
is not read on the falling edge of
to send
4
for five
Reserved
TCK
3
TCK
cycles) and then moves to the Run-Test/Idle
rising edges
Read
TMS
2
TDO
= 1 and
TCK
. Thus, JTAG_RTI sends a
TDI
Reserved
= 1 are sent on the
1-0
TMS
= 0,
TDI
=1,