AN2294 Freescale Semiconductor / Motorola, AN2294 Datasheet - Page 15

• Manufacturer Part Number: AN2294
• Description: MC68SZ328 USB Configuration Setup Application Note
• Manufacturer: Freescale Semiconductor / Motorola

3.3 Receive and Transmit Data
When receiving and transmitting data certain rules of engagement must be taken into account. The first
distinction between both actions is the way that they are processed. Both actions transmit from the same
differential lines, and the same endpoint registers in the MC68SZ328 using the USB_EPn_FDAT field
(where n = endpoint 0–4).
The USB_EPn_FDAT is a 16 bit register that is controlled by events coming from the
USB_EPn_STATCR (endpoint status registers). During configuration, the information in the status
register has to be the same as the information of the EndPtBfs buffer for each of the endpoints used. The
status register is responsible for the direction of transfer, the maximum amounts of stored bytes in FIFO,
type of transfer, FIFO flushing, stall acknowledgement, and so on.
At the same time, the USB_EPn_ISR (USB endpoint interrupt request registers) handle their specific
endpoint requests and create interrupt requests based on those software calls. Interrupts that are triggered
on this registers are: FIFO full, FIFO empty, error, high-level alarm, low-level alarm, multiple device
request, end-of-transfer, device request for single requests, and end-of-frame. When any interrupt bit is set
(interrupts occur) the USB module moves data accordingly. Follow the necessary steps to clear such
interrupts when needed.
3.3.1 Transmitting Data
When transmitting data, each endpoint in the device interfaces with its counterpart in the host through
pipes. Each FIFO in the device has a maximum amount of bytes of storage. For endpoint 0 there are 32
bytes of physical space available. Therefore, 32 byte maximum packet size that can be transmitted.
In Code Example 2 on page 11 only endpoint 0 is programmed to a maximum packet size transfer of 8
bytes (setup packet maximum size) for configuration purposes. "Ep0 - (0x0000080000)" (which
constitutes an 8 byte transfer maximum) is ignored because EP0 configuration is hard mapped, but the
download is still required to properly configure endpoints 1 to 4. However, after the endpoint configuration
is complete, the actual maximum packet size transfer for endpoint 0 is determined by the information
programmed in the MAX[1:0] of the USB_EP0_STATCR register (which should not be greater than 32
bytes).
Endpoints 1, 2, 3, and 4 can be used for control, interrupt or bulk types of transfer only. As mentioned
before, the MC68SZ328 does not support isochronous transfers. Endpoints 1 and 2 are 16 bytes and
endpoints 3, 4 are 128 bytes. Even though FIFOs for endpoints 3 and 4 are 128 bytes, the maximum
amount of packet size for a bulk transfer is 64 bytes. This doubling of space in the FIFO for endpoint 3 and
4 serves as a step to maintain data transfer timing requirements of the MC68SZ328. The behavior of each
endpoint changes according to how each endpoint register is programmed, and the behavior of each
transfer follows the characteristics of each endpoint. To send all necessary transfers from the device to the
host, the host needs to send requests to the device. The device acknowledges these requests and responds to
the host with the required information.
To Send a Packet of Data to the USB Host
Perform the following steps to send a packet of data to the USB host using programmed I/O.
Code Example 5 on page 17 provides the programming instructions to accompany these procedures.
For odd byte size packets:
MOTOROLA
1. For an N (N = odd) byte packet, write the first N-1 bytes to the FIFO data register
2. Set the WFR bit in the USB_EPn_FCTRL register, then write the last data word, (byte N-
(USB_EPn_FDAT). Data may be written as words.
1 and byte N) to the USB_EPn_FDAT register.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68SZ328 Application Note
Go to: www.freescale.com
Software Interface
15