AN2313 Freescale Semiconductor / Motorola, AN2313 Datasheet
AN2313
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AN2313 Summary of contents
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... Freescale Semiconductor, Inc. Application Note AN2313/D Rev. 0, 8/2002 Connecting an MSC8102 TDM to an MSC8101 Device by Yael Kahil The MSC8102 time-division multiplex (TDM) interface allows many devices to communicate over a single bus by using channels that have individual time slots shared in a larger transmit frame. One device drives the bus (transmit) for each channel time slot ...
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Configuring the MSC8102 TDMs Figure 2 shows a timing diagram for the interface between the MSC8102 and MSC8101. The TDM frame supports four 8-bit channels. SYNC Channel 0 Data TDM0TCLK TDM0TSYN TDM0RDAT TDM0TDAT Note: The TDM0TDATA and TDM0RDAT ports function ...
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Freescale Semiconductor, Inc. Table 1. TDM0 Interface Register Settings Bit Setting TDM0GIR[28–31]:RTSAL] = 0x4 The receive and transmit have a common clock and sync. The TDM receives one data link (TDM0RDAT) and transmits one data link (TDM0TDAT). TDM0GIR[27]:CTS = 0x0 ...
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Configuring the MSC8102 TDMs • Receive Channel Data Base Address. TDMxRCPRn[8–31]:RCDBA field. Receive data buffer n =RGBA >> RCDBA The transmit data buffer base address is a function of the following: • Transmit Global Base Address. TDMxTGBA[16–31]:TGBA field. ...
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Freescale Semiconductor, Inc. Table 4. Receive/Transmit Channel Parameter Register Settings (Continued) Bit Setting TDM0TCPR2 = 0x80000300 The transmit data buffer of channel 2 is located at an offset of 768 bytes (refer to the TDMxTGBA[16–31]:TGBA field). The address of transmit ...
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Configuring the MSC8101 MCCs 3 Configuring the MSC8101 MCCs The MSC8101 CPM contains two MCC blocks, each providing up to 128 full-duplex serial data channels routed through the programmable time-slot assigner (TSA) in the serial interfaces, SI1 and SI2. Target ...
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Freescale Semiconductor, Inc. Address (Two-Byte Field) 0x10030 0x10038 Address (2 Byte Field) 0x11000 0x11008 0x11010 0x11018 0x11020 0x11028 0x11030 0x11038 3.2 Global Parameters Each MCC has a set of global parameters in the DPRAM that are common to all channels ...
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Configuring the MSC8101 MCCs Address 0x14708714 0x14708718 0x1470871C 0x14708720 0x14708724 0x1470872C 0x1470872E 0x14708730 0x14708734 0x14708738 0x1470873C 0x14708740 0x14708744 0x14708748 0x1470874c 0x14708750 0x14708754 0x14708758 0x1470875C 0x14708760 3.3 MCC Control Registers Part of the global set- initialize the three main ...
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Freescale Semiconductor, Inc. Address 0x14700000 0x14700004 0x14700008 0x1470000C 0x14700010 0x14700012 0x14700014 0x14700018 0x1470001A 0x14700020 0x14700024 0x14700028 0x1470002c 0x14700030 0x14700032 0x14700034 0x14700038 0x1470003A 3.5 Channel Extra Parameters Each MCC channel has an 8 byte allocation for parameters defining the actual address ...
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Configuring the MSC8101 MCCs 3.6 Circular Interrupt Queues Each unmasked channel interrupt generated during the transmission and reception of data creates an entry in an interrupt queue.The receive and transmit entries are held in separate tables. In this example, RINT0 ...
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Freescale Semiconductor, Inc. 3.9 Parallel I/O Pins The CPM interface is essentially a set of I/O pins that can be configured for either a peripheral or general-purpose function. The multiplexed peripheral pins for TDMA are configured through the parallel I/O ...
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... Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna and StarCore are trademarks of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc Equal Opportunity/Affirmative Action Employer. © Motorola, Inc. 2002 AN2313/D For More Information On This Product, Go to: www.freescale.com ...