AN2321 Freescale Semiconductor / Motorola, AN2321 Datasheet - Page 12

• Manufacturer Part Number: AN2321
• Description: Designing for Board Level Electromagnetic Compatibility
• Manufacturer: Freescale Semiconductor / Motorola

AN2321/D
Integrated Circuits
Integrated circuit
packages
12
In motor control applications, both brush and brushless motors will generate
brush noise or commutator noise when the motor is running. Therefore,
suppression diodes are necessary to reduce the noise. To improve the
effectiveness of the suppression, the diodes should be placed as close as
possible to the motor contacts.
In power line inlet circuits, a TVS or high voltage varistor should be used to
provide the suppression.
One EMI problem in signal connector interfacing circuits is electrostatic
discharge (ESD). Shielded cables or connectors can be used to as protection
from external ESD. The alternative is to use TVS or varistors to protect the
signal lines.
The majority of modern digital integrated circuits (IC) are manufactured using
CMOS technology. The static power consumption of CMOS devices may be
lower, but with fast switching rates the CMOS device demands transient power
from the supply. The dynamic power demand of a high speed clocked CMOS
device may exceed an equivalent bipolar device. Therefore, decoupling
capacitors must be used on these devices to reduce the transient power
demand from the power supply.
Nowadays, there are many packages for the integrated circuit. As with discrete
components, the shorter the lead, the less the EMI problem. Therefore, the
surface mounts are preferred for better EMC performance because of lower
package parasitics and smaller loop area. Further improvements are the use of
die bonds, directly on the PCB.
The pin assignment of an IC can also affect EMC performance. ICs with supply
lines near the center of the package provide the shortest length from the die to
pin, and thus have lower lead inductance. Adjacent VCC and GND pins make
decoupling capacitor placement easier and more effective (small loop area).
The clock circuit is a major factor that affects EMC performance of both
integrated circuits and the PCB or the whole system. Most of the noise from ICs
are related to the clock frequency and its harmonic content. Therefore, both
circuit design and PCB layout techniques should be applied to the system clock
circuit to minimize the noise generated. Good grounding, adequate decoupling
capacitors, and bypass capacitors can reduce emissions. The use of high
impedance buffers for clock distribution also help to reduce any reflections and
ringing from the clock signals.
For combination logic circuits, clock jitter, signal and power line harmonics may
occur when mixed logic families are used, such as TTL and CMOS. This is
mainly due to their different switching thresholds. Therefore, the best way to
avoid these potential problems is to use ICs from one logic family. Nowadays,
most designers would choose CMOS devices because they have a higher
Designing for Board Level Electromagnetic Compatibility
Freescale Semiconductor, Inc.
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