AN2491 Freescale Semiconductor / Motorola, AN2491 Datasheet - Page 11

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AN2491

Manufacturer Part Number
AN2491
Description
Simplified Mnemonics for PowerPC Instructions
Manufacturer
Freescale Semiconductor / Motorola
Datasheet

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Branch unconditionally
Branch if condition true
Table 11 shows the syntax for basic simplified branch mnemonics
The simplified mnemonics in Table 10 that test a condition require a corresponding CR bit as the first
operand (as the examples 2–5 in Section 4.5.1, “Examples that Eliminate the BO Operand,” below
illustrate). The symbols in Table 9 can be used in place of a numeric value.
4.5.1 Examples that Eliminate the BO Operand
The simplified mnemonics in Table 10 are used in the following examples:
Table 12 lists simplified mnemonics and syntax for bc and bca without LR updating.
MOTOROLA
1
2
Branch
Branch Conditional
Branch Conditional to Link Register
Branch Conditional to Count Register
x stands for one of the symbols in Table 6, where applicable.
BI can be a numeric value or an expression as shown in Table 9.
1. Decrement CTR and branch if it is still nonzero (closure of a loop controlled by a count loaded into
2. Same as (1) but branch only if CTR is nonzero and equal condition in CR0.
3. Same as (2), but equal condition is in CR5.
4. Branch if bit 59 of CR is false.
5. Same as (4), but set the link register. This is a form of conditional call.
CTR) (note that no CR bits are tested).
bdnz target
Because this instruction does not test a CR bit, the simplified mnemonic should specify only a target
operand. Specifying a CR (for example, bdnz 0,target or bdnz cr0,target) may be considered a
programming error. Subsequent examples test conditions).
bdnzt eq
Other equivalents include bdnzt 2
bdnzt 4 * cr5 + eq,target
bdnzt 22,target would also work
bf 27,target
bf 4 * cr6 + so,target would also work
bfl 27,target
Instruction
Branch Semantics
,
Table 12. Simplified Mnemonics for bc and bca without LR Update
1
target
Simplified Mnemonics for PowerPC™ Instructions
Freescale Semiconductor, Inc.
For More Information On This Product,
bc (bca bcl bcla) BO,BI,target_addr bx
Table 11. Branch Instructions
bcctr (bcctrl)
b (ba bl bla)
Mnemonic
bclr (bclrl)
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Standard
equivalent to
equivalent to
equivalent to
equivalent to
equivalent to
,
target or the unlikely bdnzt 4 * cr0 + eq
bc 12,BI,target
bc
target_addr
Syntax
BO,BI
BO,BI
Branch Instruction Simplified Mnemonics
Mnemonic
Simplified
bt BI,target
bxctr (bxctrl)
bc 16,0,target
bc 8,2,target
bc 8,22,target
bc 4,27,target
bcl 4,27,target
N/A, syntax does not include BO
1
Mnemonic
Simplified
bxlr (bxlrl)
(bxa bxl bxla)
bca 12,BI,target
,
bca
target
BI
2
,target_addr
Syntax
BI
BI
bta BI,target
Mnemonic
Simplified
11

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