AN2530 Freescale Semiconductor / Motorola, AN2530 Datasheet - Page 18

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AN2530

Manufacturer Part Number
AN2530
Description
Standard Space Vector Modulation with Dead-Time Correction TPU Function Set
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
AN2530/D
Synchronization
signal for Standard
Space Vector
Modulation with
Dead-Time
Correction
(svmStdDt_sync)
18
Standard Space Vector Modulation with Dead-Time Correction TPU Function Set (svmStdDt)
When there are no channels of middle or low priority, simply leave out all the H
or L and the following TST or TST+4 from the formulas.
When the recommended configuration rules are not adhered to, the timing of
the worst case is much more complicated. It requires some familiarity with the
details of the TPU priority scheme. In this case, the Worst-Case Latency
(WCL), which is automatically calculated by the MPC500_Quick_Start
Graphical Configuration Tool, can serve as a good approximation. This is
always longer than the real-case is. Let the WCL be calculated after the
configuration of the TPU channels and then find the longest WCL value within
all the svmStdDt PWM channels. Convert the number, from IMB clock cycles
to TCR1 clock cycles, to get the MPW.
The svmStdDt_sync TPU function uses information obtained from svmStdDt
PWM functions, the actual PWM center times and the PWM periods. This
allows a signal to be generated, which tracks the changes in the PWM period
and is always synchronized with the PWM. The synchronization signal is a
positive pulse generated repeatedly after the prescaler or presc_copy PWM
periods (see next paragraph). The low to high transition of the pulse can be
adjusted by a parameter, either negative or positive, to go a number of TCR1
TPU cycles before or after the PWM period center time. The pulse width pw is
another synchronization signal parameter.
Freescale Semiconductor, Inc.
For More Information On This Product,
Convert MPW in IMB clock cycles to MPW in TCR1 clock cycles based
on TCR1 prescaler settings.
In case two the MPW is (according to
TST + H + TST + max(M,L) + TST+4 + HL
that is 40 + H + max(M,L) IMB clock cycles.
MPW (in IMB clock cycles) = 40 + H + max(M,L)
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Figure
9)
MOTOROLA

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