AN2688 Freescale Semiconductor / Motorola, AN2688 Datasheet - Page 3

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AN2688

Manufacturer Part Number
AN2688
Description
Implementing a 10-Bit Sigma-Delta Analog-to-Digital Converter Using the HC9S08Rx MCU Family Analog Comparator
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
MOTOROLA
Σ∆ modulators have been widely implemented in the discrete-time domain using
switched-capacitor circuits. However, continuous-time Σ∆ modulators have
become very popular since their performance is similar to the discrete-time version.
Figure 3
network acts as a passive integrator; whereas, the resistor R
converter closing the feedback loop. The R
alias filtering on the AD converter input.
Defining the oversampling ratio as:
The signal-to-noise ratio (SNR) of the first order Σ∆ modulator is given by:
From equation 2, providing the oversampling ratio is larger than approximately 130,
the circuit in
varying input signals the noise power has large peaks degrading the Σ∆ modulator
SNR, a high frequency dither signal uncorrelated with the input should be injected.
It has the effect of redistributing the energy present in the noise peaks over the
entire amplitude range maintaining the expected resolution given by equation 2.
Implementing a 10-Bit Sigma-Delta Analog-to-Digital Converter
ANALOG INPUT
where:
Using the HC9S08Rx MCU Family Analog Comparator
f
f
SIGNAL
CK
N
Freescale Semiconductor, Inc.
Figure 2. Response of the Σ∆ Modulator to a Ramp Input Signal
M = f
SNR = 30 logM – 3.41 dB
is the Nyquist rate for a signal bandwidth of f
For More Information On This Product,
shows a first order continuous-time Σ∆ AD converter where the R
is the clock sampling frequency
Figure 3. First-Order Continuous-Time Σ∆ AD Converter
CK
Figure 3
OUTPUT BIT STREAM
/f
INTEGRATOR
N
PASSIVE RC
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Σ∆ MODULATOR
R
1
C
1
allows attaining a 10-bit resolution. Since for DC or slowly
V
REF
COMPARATOR
+
ANALOG INPUT SIGNAL
FEEDBACK LOOP
1
-C
1
R
2
circuit also performs low-pass anti-
LATCH
CK
In
(f
N
= 2 f
2
SD Modulation at a Glance
works as a 1-bit DA
In
)
DIGITAL FILTER
Equation 1
Equation 2
AN2688/D
n BITS
1
-C
1
3

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