AN2897 Freescale Semiconductor / Motorola, AN2897 Datasheet - Page 5

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AN2897

Manufacturer Part Number
AN2897
Description
Using the eTPU Angle Clock
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
2.1
When an eTPU is placed into Angle Clock mode by programming the AM bit in the register ETPUTBCR,
the input to Channel 0 of the device is connected internally to the external clock input TCRCLK. This input
has an independently programmed hardware filter circuit which enables the user to select a different input
filter treatment from the rest of the eTPU input pins if desired. The filtered input signal is applied to the
Angle Clock hardware circuitry. This hardware is part of channel 0 input and the signal to the angle clock
can be conditioned by matches according to the selected mode for the channel. For example, the channel
can be placed in m2_st (Match2SingleTransition) mode, and the eTPU software can establish a window
for accepting a tooth signal from the wheel. A signal arriving too early might indicate noise and could be
ignored, while one arriving too late could indicate a stall and might require special exception processing.
2.2
When the Angle Clock is running on channel 0 of an eTPU, an input signal detected by the channel
increments TCR2. When this count occurs, a tick counter is started in the Angle Clock circuitry. This
counter increments TCR2 at a rate set by the value in the Tick Rate Register (TRR), which is programmed
in terms of TCR1 cycles. Thus if the TRR were written with a value of 100, and the TCR1 count rate was
set at 0.1 microsecond, the TCR2 counter would increment once every 10 microseconds.
The TRR is written by eTPU software from a value derived from the projected speed of the wheel. If the
application requires 200 ticks per tooth, the eTPU software will typically measure the period of the last
tooth pair in terms of TCR1, and divide the value by 200 to get the TRR value. The TRR can be
programmed with a whole number and fraction of a count. As the count proceeds, the Angle Clock logic
accumulates the fraction, and adjusts the count to compensate for the fraction. The software also programs
the number of inserted counts into the field TICKS in the Tooth Program Register (TPR). If there are 100
ticks per tooth period, then TICKS would be programmed with 99.
The tick counter is designed to count exactly TICKS+1 periods between detected physical teeth. Under
constant speed operation, TICKS +1 times the TRR rate will be exactly equal to the period between the
teeth. When the following tooth signal arrives late, the Angle Clock stops after incrementing the TCR2 by
TICKS counts. Thus the Angle Clock is said to be in Halt mode while the slowing wheel catches up with
the Angle Clock count. When the next tooth arrives, it is counted in TCR2 and the Angle Clock reverts to
Normal mode with tick counts added for the following tooth period. Thus the Angle clock cannot proceed
to the next tooth count until the physical tooth is detected.
If the wheel is accelerating, the tooth signal may be detected before the TICKS count has completed. In
this event, the Angle Clock hardware is put into a High Rate count mode. The tick count completes at an
accelerated rate equal to 1/8 of the MCU system clock (regardless of the TCR1 rate). This allows the Angle
Clock to catch up with the physical teeth. After the last tick is counted, the Angle Clock will count the
newly arrived tooth at the same rate. The high rate has been chosen to ensure that any eTPU or external
action triggered by a specific value of the angle clock can be detected and acted upon.
Freescale Semiconductor
Tooth Wheel Input
Tick Counter
The Angle Clock is designed to count all TICKS between teeth, never
skipping a count, and never proceeding with a count for the new tooth until
the physical tooth is detected.
Using the eTPU Angle Clock, Rev. 0
NOTE
eTPU Angle Clock Hardware
5

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